1 Team M1 Enigma Machine 3rd May, 2006 Adithya Attawar (M11) Shilpi Chakrabarti (M12) Mike Sokolsky (M14) Design Manager: Prateek Goenka Adithya Attawar (M11) Shilpi Chakrabarti (M12) Mike Sokolsky (M14) Design Manager: Prateek Goenka

2 Agenda for Final Presentation Title Slide Project Description Marketing Behavioral/Algorithmic Description Design Process Floorplan Issues Encountered Layout Verification Specifications Conclusions Title Slide Project Description Marketing Behavioral/Algorithmic Description Design Process Floorplan Issues Encountered Layout Verification Specifications Conclusions

3 Project Description Implement on chip the functionality of a World War II Enigma cipher machine. A sophisticated variation on a simple substitution code, it involves a string of 9 letter pair substitutions, some of which change for each new character sent through it. Must re-create the effect of both the electrical and mechanical aspects of the device on chip. User must be able to change the configuration. Each character represented as a 5-bit number. Implement on chip the functionality of a World War II Enigma cipher machine. A sophisticated variation on a simple substitution code, it involves a string of 9 letter pair substitutions, some of which change for each new character sent through it. Must re-create the effect of both the electrical and mechanical aspects of the device on chip. User must be able to change the configuration. Each character represented as a 5-bit number.

4 Marketing 1) Historical significance - Complex electromechanical device used by Germans - Was the most secure communication method during WWII 1) Historical significance - Complex electromechanical device used by Germans - Was the most secure communication method during WWII

5 Marketing Cont. 2) Fun Toy! Target Audience: year olds Innovative: Kids can send secret messages to each other behind their parent’s back! 2) Fun Toy! Target Audience: year olds Innovative: Kids can send secret messages to each other behind their parent’s back!

6 Functional Description 1 st step: Plug Board 2 nd step: Rotors 3 rd step: Reflector 4 th step: Rotors 5 th step: Plug Board 1 st step: Plug Board 2 nd step: Rotors 3 rd step: Reflector 4 th step: Rotors 5 th step: Plug Board

7 Enigma Operation: Plug board Manually wired and changed daily Daily settings specified in codebooks given to operators Matched letter pairs (A-J, J- A) Increased number of possible machine configurations by 26*24*22*… = ~10 13

8 Enigma Operation: Rotors & Reflector 26 spring-loaded contacts on each side Set to an arbitrary initial position for each message Each rotor has unique internal wiring to perform letter swaps Rightmost rotor steps one notch with each keystroke, the others every 26, 26 2, etc. Reflector does not move; hard-wired; swaps letters and ‘ reflects ’ signal back through rotors 26 spring-loaded contacts on each side Set to an arbitrary initial position for each message Each rotor has unique internal wiring to perform letter swaps Rightmost rotor steps one notch with each keystroke, the others every 26, 26 2, etc. Reflector does not move; hard-wired; swaps letters and ‘ reflects ’ signal back through rotors

9 The Datapath

10 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input

11 Char Reg Data Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 1: Input Entered

12 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 2: Plug Board

13 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 3: Rotor

14 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 4: Rotor maps new char

15 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 5: Reflector

16 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 6: Back through rotor

17 Char RegData Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 7: Rotor maps new char

18 Char Reg Data Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input Step 8: Plug Board

19 Design Process Initial Design: Problem:How to model the Mechanical behavior of the machine? Solution: Use a modular system architecture with memory used to implement the rotors, plugboard, and reflector The Modular nature of the design allows for flexibility in the number of wheels used and the initial position of the wheels. Initial Design: Problem:How to model the Mechanical behavior of the machine? Solution: Use a modular system architecture with memory used to implement the rotors, plugboard, and reflector The Modular nature of the design allows for flexibility in the number of wheels used and the initial position of the wheels.

20 Design Process Design Decisions: Use a separate ROM for the wheel and reflector. This allows for 1-bit less in addressing and removes one clock cycle from the encryption Design Decisions: Use a separate ROM for the wheel and reflector. This allows for 1-bit less in addressing and removes one clock cycle from the encryption

21 Floorplan Initial floorplan

22 Wheelreg_serialin Wheelcounters Fsm Adder_mod26 Reg3bx8 serialin rom208 RAM rom26 RAM Final Floorplan

23 Final Layout

24 Reg3bx8 serialin AddMod26 rom208 Fsm Wheelreg_serial Wheel Counters RAM ROM26 RAM Final Layout

25 Metal Rules Low-level modules use rules of directionality as guidelines. Use metal 2 sparingly High-level modules use metal 2 as short interconnects, 3 & 4 follow top-level rules Top-level uses metal 2 in any direction, 3 & 4 directions are strictly enforced

26 Layer Masks - Poly Density: 8.25% Transistor Density: 0.19 per µM 2

27 Layer Masks - Metal 1 Density: 31.36%

28 Layer Masks - Metal 2 Density: 16.96%

29 Layer Masks - Metal 3 Density: 12.25%

30 Layer Masks - Metal 4 Density: 11.44%

31 Verification C Code / Behavioral / Structural is easy!!! NC Verilog schematic verification also easy, same results. Analog simulations of the entire chip need to be broken down.

32 Module Testing

33 Estimated Critical Path

34 Char Reg Data Reg 5-Bit Adder % 26 Wheel shift ROM Plugboard SRAM Reflector ROM Output Reg Current Wheel Counter Wheel Position Counters Input ExtractedRC Delay: 3.03nS Max estimated clock speed of 333 Mhz. Estimated Critical Path

35 What’s holding it back? Worst case adder delay is well over twice as long as most other cases Decoders -> contribute most of the delay to the SRAM and ROM. A + B >

36 Pins PINS#Purpose Data Inputs16 setting inputs, character input Control Inputs4 clk, set, reset, start Data Outputs5 character out Power2 vdd, ground TOTAL27

37 Usage Set enters the initialization and load mode. (26 clock cycles) Reset clears the current operation and state, returns to the initialized settings. Newchar starts the encryption cycle, completes and leaves the value at charout.

38 Specifications Maximum clock speed: 333 Mhz Average power consumption: 2 mW Throughput (3-wheel encryption): 20.8 million characters/second How does this compare to our base case??? Total # of transistors: 9247 Final area: 200 x 253 µM ( 5x10 -8 µM 2 )

39 Is it an improvement? Some estimates from the original machine: Average power consumption: 130 Watts Throughput (any encryption): 2.5 characters/second Size: 28 x 34 x 15 cm

40 In conclusion This new generation enigma encryption device: Uses 63,000 times less power than the original And runs 7 million times faster Is 40,000 times smaller

41 Citations- Rabaey, J. M. et al., Digital Integrated Circuits, Prentice Hall, Stojanovic, V. et al., Comparative Analysis of Latches and Flip- Flops for High-Performance Systems, ICCD Conference Proceedings, Blanton, S., Digital Computation: Fast Adders, Lecture Notes, Enigma Machine, photograph, Engima Wheels and Plugboad, photographs, Rabaey, J. M. et al., Digital Integrated Circuits, Prentice Hall, Stojanovic, V. et al., Comparative Analysis of Latches and Flip- Flops for High-Performance Systems, ICCD Conference Proceedings, Blanton, S., Digital Computation: Fast Adders, Lecture Notes, Enigma Machine, photograph, Engima Wheels and Plugboad, photographs,