CSE 246: Computer Arithmetic Algorithms and Hardware Design Instructor: Prof. Chung-Kuan Cheng Winter 2004 Lecture 4
CSE 2462 Topics: Adders Synchronous v.s. Asynchronous AND/OR gate v.s. Circuit Logic angle Graph angle (Prefix Adder)
CSE 2463 Prefix Computation FSM example: Given: initial state S 0 =A A sequence of inputs: ( ) Derive the sequence of outputs ABC 0/01/0 0/0 1/0 0/0 1/1 PSNextState X=0X=1 ABA BBC CBA State table BC BB BA X=0 NSPS M0M0 AC CB AA X=1 NSPS M1M1 Input Sequence: 0 1 … Compute N ’ s: N 1 =M 0 N 2 =M 0 M 0 N 3 =M 1 M 0 M 0 N 4 =M 1 M 1 M 0 M 0 … PSNS 12 AB BB CB PSNS 13 AC BC CC PSNS 14 AA BA CA
CSE 2464 Graph Based Approach Consider the (g p) chain break the long paths C4C4 g3g3 g2g2 g1g1 p3p3 p2p2 p1p1 C1C1
CSE 2465 Graph Based Approach Generating g 32 and p 32 C4C4 g3g3 g2g2 g1g1 p3p3 p2p2 p1p1 C1C1 g3g3 p3p3 g2g2 p2p2 g 32 p 32
CSE 2466 Graph Based Approach Generating g 10 and p 10 C4C4 g3g3 g2g2 g1g1 p3p3 p2p2 p1p1 c in g1g1 p1p1 g 10 p 10
CSE 2467 Graph Based Approach Generating g 30 and p 30 g 32 p 32 g 10 p 10 g 30 p 30 g3g3 p3p3 g2g2 p2p2 g 32 p 32 g1g1 p1p1 c in g 10 p 10
CSE 2468 Boolean Approach g 4 + p 4 ( g 3 + p 3 ( g 2 + p 2 ( g 1 + p 1 ( g 0 + p 0 c in ) ) ) ) g 4, p 4 g 3, p 3 g 2, p 2 g 1, p 1 g 0, p 0 c in g 4 +p 4 g 3, p 4 p 3 g 2 +p 2 g 1, p 2 p 1 g 0, p 0 c in g 4 +p 4 g 3 +p 4 p 3 (g 2 +p 2 g 1 ), p 4 p 3 p 2 p 1 g 0, p 0 c in g 4 +p 4 g 3 +p 4 p 3 (g 2 +p 2 g 1 )+(p 4 p 3 p 2 p 1 )g 0, (p 4 p 3 p 2 p 1 ) p 0 c in
CSE 2469 Prefix Adder Given: n inputs (g i, p i ) An operation o Compute: y i = (g i, p i ) o … o (g 1, p 1 ) ( 1 <= i <= n) Associativity (A o B) o C = A o ( B o C) (g ’’, p ’’ ) o (g ’, p ’ ) = (g, p) g=g ’’ + p ’’ g ’ p=p ’’ p ’ gi=pi=gi=pi= a, i=1 a i b i, otherwise 1, i=1 a i xor b i, otherwise
CSE Prefix Adder: Graph Representation Example: Ripple Carry Adder a i b i (g i, p i ) x y x o y
CSE Prefix Adders: Conditional Sum Adder
CSE Prefix Adders: Conditional Sum Adder For output y i, there is an alphabetical tree covering inputs (x i, x i-1, …, x 1 ) alphabetical tree: Binary tree Edges do not cross
CSE Prefix Adders: Conditional Sum Adder From input x 1, there is a tree covering all outputs (y i, y i-1, …, y 1 ) The nodes in this tree can be reduced to (g, p) o c = g+pc
CSE Prefix Adders: size and depth Objective: Minimize # of nodes, s c(n). Minimize depth, d c(n) Ripple Carry Adder: s c(8) = 7 d c(8) = 7 total = 14 Conditional Sum Adder: s c(8) = 12 d c(8) = 3 total = 15
CSE Prefix Adders: size and depth Theorem:s c(n) +d n c(n) >= s c(n) +d n c(n) >= 2n-2 d n c(n) means the depth of the last output Proof: Alphabetical tree of y n contains n-1 internal nodes. For each column where the prefix is not ready, at lease one extra node is needed, therefore we need at least n-(d n c(n) +1) extra nodes s c(n) >=n-1+(n – (d n c(n) +1))=2n-2-d n c(n) s c(n) + d n c(n) >= 2n-2
CSE Prefix Adders: Brent – Kung Adder s c(16) = 26 d c(16) = 6 total = 32
CSE Carry Skip Adder A0A0 a 3,0 b 3,0 c in c4c p 3,0 A1A1 a 7,4 b 7,4 c8c p 7,4 c4c4 A2A2 a 11,8 b 11,8 c p 11,8 c8c8 c 12 If p 3,0 =p 3 p 2 p 1 p 0 = 1, then x = c in x
CSE Carry Propagation Paths A 2 <- MUX <- MUX <- c in A 2 <- MUX <- A 1 A 2 <- MUX <- MUX <- A 0 c 12 <- MUX <- A 2 c 12 <- MUX <- MUX <- A 1 c 12 <- MUX <- MUX <- MUX <- A 0 c 12 <- MUX <- MUX <- MUX <- MUX <- c in
CSE False Path A 1 <- MUX <- A 0 <- c in is a false path If carry is from cin, then block must have p 3 p 2 p 1 p 0 = 1 Since p 3,0 = 1, g 3,0 must be 0 The carry is not generated from A 0 The carry needs not to propagate via A 0, it will go from the MUX
CSE Label Algorithm Problem: Given a digraph, a set of false paths Derive the longest path of the graph Algorithm: Color the edges on each false path a label The length of the walk of the same labels are accumulated Otherwise, change to no label