H. EvansRun IIb L1Cal Meeting: 6-Mar-031 Changes to the GAB Current System Architecture Changes to GAB to Streamline this Architecture How this Affects.

Slides:

Advertisements

Similar presentations

B. Hall June 14, 2001Pixel ReadoutPage 1 Goals Look at two word synchronization techniques. Look at signal integrity of LVDS transmission at receiving.

Advertisements

PXL RDO System Requirements And meeting goals 11/12/2009BNL_CD-1_SENSOR_RDO - LG1.

CPT Week, Nov 2003, B. Paul Padley, Rice University1 CSC Trigger Status, MPC and Sorter B. Paul Padley Rice University November 2003.

CMS Week Sept 2002 HCAL Data Concentrator Status Report for RUWG and Calibration WG Eric Hazen, Jim Rohlf, Shouxiang Wu Boston University.

L1CAL Online Software Philippe Laurens 31-May-2005.

Dir Rev of Run IIb June 3-5, Level-1 Calorimeter Trigger (WBS 1.2.1) Hal EvansColumbia University for the Run IIb L1Cal group.

First Integration Tests Jovan Mitrevski, John Parsons Nevis Labs, Columbia University August 21/2003  on July 30/31, we successfully performed first phase.

Endcap Muon meeting: UC Davis, Feb , 2005 J. Hauser UCLA 1 TMB and RAT Status Report Outline: Current status of TMB and RAT boards Noise measurements.

RPC Electronics Status Overall system TDC –Digitizing frequency issue (determine the bin size of the TDC value) Discriminator test result Trigger module.

28 August 2002Paul Dauncey1 Readout electronics for the CALICE ECAL and tile HCAL Paul Dauncey Imperial College, University of London, UK For the CALICE-UK.

H. EvansD0 PMG: 1-Apr-031 Changes to the GAB Current System Architecture Changes to GAB to Streamline this Architecture How this Affects the Schedule/Costs.

H. EvansRun IIb Trigger Meeting: 26-Feb-04 1 Ensuring Success for L1Cal in Run IIb H. EvansColumbia U. Outline 1.Pre-Installation (extensive use of Test.

6 June 2002UK/HCAL common issues1 Paul Dauncey Imperial College Outline: UK commitments Trigger issues DAQ issues Readout electronics issues Many more.

Bagby/Mulhearn L1_Cal Int/Comm  The L1_Cal Integration and Commissioning team has a new schedule based on the Review Committee’s charge and Dan’s.

H. EvansRun2b L1Cal Meeting: 03-Oct-021 Nevis Design Status: Summary Hal EvansColumbia University Trigger Algorithm Board –Done  Jet, EM & Tau Sliding.

4 Dec 2001First ideas for readout/DAQ1 Paul Dauncey Imperial College Contributions from all of UK: result of brainstorming meeting in Birmingham on 13.

HCAL FIT 2002 HCAL Data Concentrator Status Report Gueorgui Antchev, Eric Hazen, Jim Rohlf, Shouxiang Wu Boston University.

H. EvansRun IIb L1Cal Meeting: 1-May-031 Goals of the Summer Integration Test Summer Integration Schedule –16-Jul-03 – 8-Oct-03 Test Infrastructure –what.

IEEE 2003 Real Time Conference D. Calvet Algorithms and Architecture for the L1 Calorimeter Trigger at D0 Run IIb J. Bystricky, D. Calvet, P. Le Dû, E.

DØ L1Cal Trigger 10-th INTERNATIONAL CONFERENCE ON INSTRUMENTATION FOR COLLIDING BEAM PHYSICS Budker Institute of Nuclear Physics Siberian Branch of Russian.

® ChipScope ILA TM Xilinx and Agilent Technologies.

Trigger Supervisor (TS) J. William Gu Data Acquisition Group 1.TS position in the system 2.First prototype TS 3.TS functions 4.TS test status.

XTRP Hardware Mike Kasten University of Illinois 2/24/00.

Leo Greiner IPHC testing Sensor and infrastructure testing at LBL. Capabilities and Plan.

LECC 2004 – Boston – September 13 th L.Guiducci – INFN Bologna 1 The Muon Sorter in the CMS Drift Tubes Regional Trigger G.M. Dallavalle, Luigi Guiducci,

1 Design of Pulsar Board Mircea Bogdan (for Pulsar group) Level 2 Pulsar Mini-Review Wednesday, July 24, 2002.

U N C L A S S I F I E D FVTX Detector Readout Concept S. Butsyk For LANL P-25 group.

Leo Greiner IPHC meeting HFT PIXEL DAQ Prototype Testing.

PHENIX upgrade DAQ Status/ HBD FEM experience (so far) The thoughts on the PHENIX DAQ upgrade –Slow download HBD test experience so far –GTM –FEM readout.

Status of the CSC Track-Finder Darin Acosta University of Florida.

June 3, 2005H Themann SUSB Physics & Astronomy 1 Phenix Silicon Pixel FEM S. Abeytunge C. Pancake E. Shafto H. Themann.

HBD FEM the block diagram preamp – FEM cable Status Stuffs need to be decided….

June 29th 2005Ph. BUSSON LLR Ecole polytechnique, Palaiseau1 Plans for a new TCC for the endcaps Characteristics: reminder Preliminary list of tasks and.

Leo Greiner IPHC DAQ Readout for the PIXEL detector for the Heavy Flavor Tracker upgrade at STAR.

Status of Global Trigger Global Muon Trigger Sept 2001 Vienna CMS-group presented by A.Taurok.

Update on the HBD Craig Woody BNL DC Meeting June 8, 2005.

HBD FEM Overall block diagram Individual building blocks Outlook ¼ detector build.

CPT Week, April 2001Darin Acosta1 Status of the Next Generation CSC Track-Finder D.Acosta University of Florida.

Claudia-Elisabeth Wulz Anton Taurok Institute for High Energy Physics, Vienna Trigger Internal Review CERN, 6 Nov GLOBAL TRIGGER.

Muon Electronics Upgrade Present architecture Remarks Present scenario Alternative scenario 1 The Muon Group.

E. Hazen – FNAL – 5 Apr 2004 L1CTT DFEA Motherboard / Daughterboard Design, Cost, Schedule 4.

Hardware proposal for the L2  trigger system detailed description of the architecture mechanical considerations components consideration electro-magnetic.

CMX status and plans Yuri Ermoline for the MSU group Level-1 Calorimeter Trigger Joint Meeting CERN, October 2012,

Status and planning of the CMX Wojtek Fedorko for the MSU group TDAQ Week, CERN April , 2012.

Leo Greiner PIXEL Hardware meeting HFT PIXEL detector LVDS Data Path Testing.

PROGRESS ON ENERGY SUM ELECTRONIC BOARD. VXS Backplane Energy Sum 18 fADC VME64 High Speed Serial VME64 16 CH Detector Signals Crate Sum to Trigger Energy.

CMX Hardware Overview Chip Brock, Dan Edmunds, Philippe Yuri Wojciech Michigan State University 19-May-2014.

This material exempt per Department of Commerce license exception TSU Xilinx On-Chip Debug.

FNAL PMG Feb 5, DØ RunIIb Trigger Upgrade WBS 1.2 Paul Padley, Rice University for the DØ Trigger Upgrade Group.

CSC Muon Sorter M. Matveev Rice University January 7, 2003.

1 L1CAL for DAQ Shifter By Selcuk Cihangir 3/20/2007 Representing L1CAL group (slides from many people)

1 Calorimeter electronics Upgrade Outcome of the meeting that took place at LAL on March 9th, 2009 Calorimeter Upgrade Meeting Barcelona March 10th-11st,

FVTX Electronics (WBS 1.5.2, 1.5.3) Sergey Butsyk University of New Mexico Sergey Butsyk DOE FVTX review

J1 J3 J2 FF0FF1FF2FF3FF4FF5 DM DD System ACE DC  DC The Cartoon Guide to the ZPD.

UPDATE ON CLICPIX2 DESIGN Pierpaolo Valerio Edinei Santin

11 October 2002Paul Dauncey - CDR Introduction1 CDR Introduction and Overview Paul Dauncey Imperial College London.

Strategy for unified data link Zhen-An LIU Institute of High Energy Physics.

1 Carleton/Montreal Electronics development J.-P Martin (Montreal) Shengli Liu & M. Dixit (Carleton) LC TPC Meeting DESY Hamburg, 4 June 2007.

1 Status of Validation Board, Selection Board and L0DU Patrick Robbe, LAL Orsay, 19 Dec 2006.

Status of the SVD DAQ Koji Hara (KEK) 2012/1/16 TRG/DAQ meeting1.

The LHCb Calorimeter Triggers LAL Orsay and INFN Bologna.

ECAL electronics schedule JFMAMJJASONDJFMAM Prototype 2 boards Design Layout Fabrication and assembly Testing, including VFE prototype tests Production.

The Data Handling Hybrid

Differencing Multistage Detector

Current DCC Design LED Board

A New Clock Distribution/Topology Processor Module for KOTO (CDT)

HCAL Data Concentrator Production Status

CMS EMU TRIGGER ELECTRONICS

CMX Status and News - post PRR -

Lehman 2000 Project Timeline

Presentation transcript:

H. EvansRun IIb L1Cal Meeting: 6-Mar-031 Changes to the GAB Current System Architecture Changes to GAB to Streamline this Architecture How this Affects the Schedule/Costs H. EvansColumbia/Nevis

H. EvansRun IIb L1Cal Meeting: 6-Mar-032 Current TAB/GAB Architecture TAB I/O is Fierce Lots of Traces on Board – pin FPGAs +… No room for: –standard VME –SCL mezzanine GAB (currently) Deals w/ This 1.Trigger Functions 2.VME Interface 3.SCL Interface SignalI/OCablesWhere PowerIBusRear ADF TTsI30Rear Cal-TrackO3Front L2/L3O1Front Timing (SCL)I1Front VMEI/O1Front

H. EvansRun IIb L1Cal Meeting: 6-Mar-033 VME & SCL to the TAB Serial VME Interface LVDS protocol & same cable/connector type as ADF-to-TAB transmission Run at 15 MHz –download FPGAs~10s –TAB monitoring~10ms Serial SCL Interface LVDS & ADF-to-TAB cable Run at 7.6 MHz Reconstruct BX & TURN on TAB Local Clock for testing w/out SCL PairDescriptionPairDescription ser_clklink clockclk77.6 MHz clock ser_frm_in1 st bit marker + Addr(23:16)initinit request ser_addr_inAddr(15:0)turnSCL first_period ser_data_inInput Data(15:0)l1_acceptL1 Accept signal ser_frm_out1 st bit markerpulseinternal synchronization ser_data_outOutput Data(15:0)spare

H. EvansRun IIb L1Cal Meeting: 6-Mar-034 Testing the TAB Prototype Goal: have TAB ready for July Integration Problem: TAB Layout Difficult –Layout Tool (pads) barely up to the Task TAB Testing Stages at Nevis 1.Electrical/FPGA testsSignal Tap 2.Test Data ReadbackVME 3.Test Data w/ Simple TimingFake SCL 4.Output to GABGAB Full GAB Functionality not Required until Late in the Game Solution: Split GAB into Three Boards 1.VME Interfacevery simple, 6U? 2.SCL Interfacesimple, 6U? 3.GABlives in TAB crate, similar interfaces

H. EvansRun IIb L1Cal Meeting: 6-Mar-035 The New System Advantages TAB  July Integr. Test –comp’s necessary for TAB tests avail. when needed –impossible w/out changes Simplifies Design –GAB Layout easier –GAB testing easier –Maintenance easier Disadvantages Cost ? –orig: proto=$12K; prod=$8K –additional cost ~$4K (fab) Maybe this is an Advantage ? –Engineering ~same –Comp’s ~same as orig. est. –Fabrication signif. easier –6U vme + 9U shell vs 9U vme

H. EvansRun IIb L1Cal Meeting: 6-Mar-036 Prototype Schedule ItemOld SchedNew Sched TAB Assembled3/14/034/25/03 TAB Bench Tested5/16/036/30/03 GAB Assembled4/11/036/24/03 GAB Bench Tested7/15/038/29/03 VME Interface Assembled  4/18/03 VME Interface Tested  6/30/03 SCL Interface Assembled  5/2/03 SCL Interface Tested  6/30/03 Start Integration Test7/16/03 End Integration Test10/8/03 Production Schedule Unaffected