1 Register Allocation Consists of two parts: –register allocation What will be stored in registers –Only unambiguous values –register assignment Which.

Slides:



Advertisements
Similar presentations
Register Allocation COS 320 David Walker (with thanks to Andrew Myers for many of these slides)
Advertisements

Register Allocation Consists of two parts: Goal : minimize spills
Compiler Support for Superscalar Processors. Loop Unrolling Assumption: Standard five stage pipeline Empty cycles between instructions before the result.
Register Usage Keep as many values in registers as possible Register assignment Register allocation Popular techniques – Local vs. global – Graph coloring.
P3 / 2004 Register Allocation. Kostis Sagonas 2 Spring 2004 Outline What is register allocation Webs Interference Graphs Graph coloring Spilling Live-Range.
Register allocation Morgensen, Torben. "Register Allocation." Basics of Compiler Design. pp from (
Register Allocation Zach Ma.
Register Allocation CS 320 David Walker (with thanks to Andrew Myers for most of the content of these slides)
1 CS 201 Compiler Construction Lecture 3 Data Flow Analysis.
Architecture-dependent optimizations Functional units, delay slots and dependency analysis.
Idea of Register Allocation x = m[0]; y = m[1]; xy = x*y; z = m[2]; yz = y*z; xz = x*z; r = xy + yz; m[3] = r + xz x y z xy yz xz r {} {x} {x,y} {y,x,xy}
1 Code generation Our book's target machine (appendix A): opcode source1, source2, destination add r1, r2, r3 addI r1, c, r2 loadI c, r2 load r1, r2 loadAI.
Coalescing Register Allocation CS153: Compilers Greg Morrisett.
COMPILERS Register Allocation hussein suleman uct csc305w 2004.
Graph-Coloring Register Allocation CS153: Compilers Greg Morrisett.
Data-Flow Analysis Framework Domain – What kind of solution is the analysis looking for? Ex. Variables have not yet been defined – Algorithm assigns a.
Stanford University CS243 Winter 2006 Wei Li 1 Register Allocation.
Register Allocation CS 671 March 27, CS 671 – Spring Register Allocation - Motivation Consider adding two numbers together: Advantages: Fewer.
Carnegie Mellon Lecture 6 Register Allocation I. Introduction II. Abstraction and the Problem III. Algorithm Reading: Chapter Before next class:
1 Data flow analysis Goal : collect information about how a procedure manipulates its data This information is used in various optimizations For example,
1 CS 201 Compiler Construction Lecture 12 Global Register Allocation.
1 Handling nested procedures Method 1 : static (access) links –Reference to the frame of the lexically enclosing procedure –Static chains of such links.
Improving code generation. Better code generation requires greater context Over expressions: optimal ordering of subtrees Over basic blocks: Common subexpression.
Register Allocation (Slides from Andrew Myers). Main idea Want to replace temporary variables with some fixed set of registers First: need to know which.
Global optimization. Data flow analysis To generate better code, need to examine definitions and uses of variables beyond basic blocks. With use- definition.
Prof. Bodik CS 164 Lecture 171 Register Allocation Lecture 19.
4/25/08Prof. Hilfinger CS164 Lecture 371 Global Optimization Lecture 37 (From notes by R. Bodik & G. Necula)
1 CS 201 Compiler Construction Lecture 3 Data Flow Analysis.
Register Allocation (via graph coloring)
U NIVERSITY OF M ASSACHUSETTS, A MHERST Department of Computer Science Emery Berger University of Massachusetts, Amherst Advanced Compilers CMPSCI 710.
Register Allocation (via graph coloring). Lecture Outline Memory Hierarchy Management Register Allocation –Register interference graph –Graph coloring.
Prof. Fateman CS 164 Lecture 221 Global Optimization Lecture 22.
1 Liveness analysis and Register Allocation Cheng-Chia Chen.
Improving Code Generation Honors Compilers April 16 th 2002.
Improving code generation. Better code generation requires greater context Over expressions: optimal ordering of subtrees Over basic blocks: Common subexpression.
Global optimization. Data flow analysis To generate better code, need to examine definitions and uses of variables beyond basic blocks. With use- definition.
Data Flow Analysis Compiler Design Nov. 8, 2005.
1 ECE 453 – CS 447 – SE 465 Software Testing & Quality Assurance Instructor Kostas Kontogiannis.
Supplementary Lecture – Register Allocation EECS 483 University of Michigan.
1 Code Generation Part II Chapter 8 (1 st ed. Ch.9) COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University,
1 October 18, October 18, 2015October 18, 2015October 18, 2015 Azusa, CA Sheldon X. Liang Ph. D. Azusa Pacific University, Azusa, CA 91702, Tel:
U NIVERSITY OF D ELAWARE C OMPUTER & I NFORMATION S CIENCES D EPARTMENT Optimizing Compilers CISC 673 Spring 2009 Register Allocation John Cavazos University.
1 Code Generation Part II Chapter 9 COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University, 2005.
Interference Graphs for Programs in Static Single Information Form are Interval Graphs Philip Brisk Processor Architecture Laboratory (LAP) EPFL Lausanne,
Graph Colouring L09: Oct 10. This Lecture Graph coloring is another important problem in graph theory. It also has many applications, including the famous.
Global Register Allocation via Graph Coloring Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved. Students enrolled in Comp.
Register Allocation Harry Xu CS 142 (b) 02/11/2013.
Register Usage Keep as many values in registers as possible Keep as many values in registers as possible Register assignment Register assignment Register.
Register Allocation CS 471 November 12, CS 471 – Fall 2007 Register Allocation - Motivation Consider adding two numbers together: Advantages: Fewer.
2/22/2016© Hal Perkins & UW CSEP-1 CSE P 501 – Compilers Register Allocation Hal Perkins Winter 2008.
1 Liveness analysis and Register Allocation Cheng-Chia Chen.
Single Static Assignment Intermediate Representation (or SSA IR) Many examples and pictures taken from Wikipedia.
Global Register Allocation Based on
Topic Register Allocation
Register Allocation Hal Perkins Autumn 2009
Topic 10: Dataflow Analysis
Register Allocation Hal Perkins Autumn 2011
Register Allocation Hal Perkins Summer 2004
Register Allocation Hal Perkins Autumn 2005
Final Code Generation and Code Optimization
Lecture 17: Register Allocation via Graph Colouring
Code Generation Part II
CSE P 501 – Compilers SSA Hal Perkins Autumn /31/2019
Objectives Identify advantages (and disadvantages ?) of optimizing in SSA form Given a CFG in SSA form, perform Global Constant Propagation Dead code elimination.
Objectives Identify advantages (and disadvantages ?) of optimizing in SSA form Given a CFG in SSA form, perform Global Constant Propagation Dead code elimination.
(via graph coloring and spilling)
Register Allocation Harry Xu CS 142 (b) 05/08/2018.
Code Optimization.
CS 201 Compiler Construction
Presentation transcript:

1 Register Allocation Consists of two parts: –register allocation What will be stored in registers –Only unambiguous values –register assignment Which register will be assigned to each variable? Goal : minimize spills How hard is it? –BB w/ one size of data: polynomial –otherwise, NP-complete based on graph coloring.

2 Local Register Allocation Within a basic block –Top-down Assign registers to the most heavily used variables –Traverse the block –Count uses –Use count as a priority function –Assign registers to higher priority variables first Advantage –Heavily used values reside in registers Disadvantage –Does not consider non-uniform distribution of uses

3 Local Register Allocation Is is sufficient? –Does not take into account that some instructions (e.g. those in loops) execute more frequently –Forces us to store/load at basic block endpoints since each block has no knowledge of the context of others. We need Global Register Allocation –Live ranges will be defined differently –Cost of spilling will depend on frequencies and locations of uses.

4 Global register allocation Global register allocation can be seen as a graph coloring problem Basic idea: –Identify the live range of each variable –Build an interference graph that represents conflicts between live ranges (two nodes are connected if the variables they represent are live at the same moment) Issue : copy statements –Coalesce live ranges? –Try to assign as many colors to the nodes of the graph as there are registers so that two neighbors have different colors. In what order should we assign colors? Must define priority

5 Global register allocation Estimating the cost of not assigning a register. –Size of live range –Number of uses/definitions –Frequency of execution –Number of loads/stores needed. –Cost of loads/stores needed.

6 Global register allocation Priority-based graph coloring Live Range = a group of flowgraph nodes in which a variable is defined and referenced. –No outside definition of the variable reaches a reference inside the live range –The definitions of the variables inside the live range do not reach uses of that variable outside the live range. –The live range is not necessarily contiguous.

7 Global register allocation Priority-based graph coloring We will need LOADs at the entry points of the live range and STOREs at the exit points. Consider: =a a= =a

8 Global register allocation Priority-based graph coloring We will need LOADs at the entry points of the live range and STOREs at the exit points. LOAD conditions: –There is a reference before a definition AND BB is an entry point to the live range BB is not an entry point but its predecessor has a procedure call that accesses the variable. STORE conditions: –The live range contains definitions of the variable –The variable is not dead on exit BB is exit, but variable is not local BB ends in procedure call that accesses variable Variable is live in next block (this may apply after a split) Variable is LOADed in next block.

9 Global register allocation Priority-based graph coloring LR(x) = {B | x is live at B}  {B | x is reaching in B } –x live at B = x is referenced in B, or x live at the end of B –x reaching in B = a definition of x reaches B a use of x (backwards-) reaches B

10 Global register allocation Priority-based graph coloring Interference graph: –nodes : live ranges of variables –edges : two live ranges are connected if their intersection in non-empty –meaning : if two live ranges are connected, then the variables they represent are both live at the same point, so they will need to be stored in different registers

11 Global register allocation Priority-based graph coloring Priorities: –Each live range lr is assigned a priority that measures the relative benefits of assigning it to a register –The priority function is –The size of the live range is the number of nodes in it. –We must take into account loop structure.

12 Global register allocation Priority-based graph coloring TOTALSAVE (lr) =  (NETSAVE B  nestingdepth B ) NETSAVE = LOADSAVE  num_uses + STORESAVE  num_defs  MOVECOST  num_moves num_moves is 0, 1, or 2. It is determined by the number of LOADs and STOREs needed at entry and exit points. (see slide 8)slide 8

13 Global register allocation Priority-based graph coloring LOADSAVE = The amount of execution time saved for each use of a variable residing in a register rather than memory STORESAVE = The amount of execution time saved for each definition of a variable residing in a register rather than memory MOVECOST = The cost of a memory-to-register or register-to- memory move. if the first occurrence of a variable in its live range is a use, then it must be loaded from memory if the variable is live at the end of its live range, then it must be stored to memory.

14 Global register allocation Priority-based graph coloring unconstrained live range : a live range that has fewer neighbors in the interference graph than there are registers. It can ALWAYS be colored, so we color it last. constrained live range : any range that is not unconstrained :)

15 Global register allocation Priority-based graph coloring The coloring algorithm 1. Identify and set aside the unconstrained live ranges 2. While there remain constrained live ranges and more registers to be assigned, repeat steps (a) to (c) (a) Compute the priority of each live range (b) Assign a color to the live range lr with highest priority (c) Update available color info for lr's neighbors. Check if any need to be split and, if so, apply splitting algorithm. 3. Assign colors to the unconstrained live ranges

16 Global register allocation Priority-based graph coloring The splitting algorithm 1. Find a block in lr in which the first appearance is a definition, preferably an entry point. Else, start with the first block that contains a use. This basic block must have available registers. 2. For each successor of the first block, check if it can be added to the new live range 3. Once the new live range has been determined, update the interference graph