Spring 08, Feb 14 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Linear Programming – A Mathematical Optimization.

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Spring 08, Feb 14 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Linear Programming – A Mathematical Optimization Technique Vishwani D. Agrawal James J. Danaher Professor ECE Department, Auburn University, Auburn, AL

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)2 What is Linear Programming   Linear programming (LP) is a mathematical method for selecting the best solution from the available solutions of a problem.   Method:   State the problem and define variables whose values will be determined.   Develop a linear programming model:   Write the problem as an optimization formula (a linear expression to be minimized or maximized)   Write a set of linear constraints   An available LP solver (computer program) gives the values of variables.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)3 Types of LPs   LP – all variables are real.   ILP – all variables are integers.   MILP – some variables are integers, others are real.   A reference:   S. I. Gass, An Illustrated Guide to Linear Programming, New York: Dover, 1990.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)4 A Single-Variable Problem   Consider variable x   Problem: find the maximum value of x subject to constraint, 0 ≤ x ≤ 15.   Solution: x = Constraint satisfied x Solution x = 15

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)5 Single Variable Problem (Cont.)   Consider more complex constraints:   Maximize x, subject to following constraints:   x ≥ 0(1)   5x ≤ 75(2)   6x ≤ 30(3)   x ≤ 10(4) x (1) (2) (3) (4) All constraints satisfied Solution, x = 5

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)6 A Two-Variable Problem   Manufacture of chairs and tables:   Resources available:   Material: 400 boards of wood   Labor: 450 man-hours   Profit:   Chair: $45   Table: $80   Resources needed:   Chair   5 boards of wood   10 man-hours   Table   20 boards of wood   15 man-hours   Problem: How many chairs and how many tables should be manufactured to maximize the total profit?

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)7 Formulating Two-Variable Problem   Manufacture x 1 chairs and x 2 tables to maximize profit: P = 45x x 2 dollars   Subject to given resource constraints:   400 boards of wood,5x x 2 ≤ 400(1)   450 man-hours of labor,10x x 2 ≤ 450(2)   x 1 ≥ 0(3)   x 2 ≥ 0 (4)

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)8 Solution: Two-Variable Problem Chairs, x 1 Tables, x 2 (1) (2) (24, 14) Profit increasing decresing P = 2200 P = 0 Best solution: 24 chairs, 14 tables Profit = 45× ×14 = 2200 dollars (3) (4) Material constraint Man-power constraint

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)9 Change Profit of Chair to $64/Unit   Manufacture x 1 chairs and x 2 tables to maximize profit: P = 64x x 2 dollars   Subject to given resource constraints:   400 boards of wood,5x x 2 ≤ 400(1)   450 man-hours of labor,10x x 2 ≤ 450(2)   x 1 ≥ 0(3)   x 2 ≥ 0 (4)

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)10 Solution: $64 Profit/Chair Chairs, x 1 Tables, x 2 (1) (2) Profit increasing decresing P = 2880 P = 0 Best solution: 45 chairs, 0 tables Profit = 64× ×0 = 2880 dollars (24, 14) (3) (4) Material constraint Man-power constraint

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)11 A Dual Problem   Explore an alternative.   Questions:   Should we make tables and chairs?   Or, auction off the available resources?   To answer this question we need to know:   What is the minimum price for the resources that will provide us with same amount of revenue as the profits from tables and chairs?   This is the dual of the original problem.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)12 Formulating the Dual Problem   Revenue received by selling off resources:   For each board, w 1   For each man-hour, w 2   Minimize 400w w 2   Subject to constraints:   5w w 2 ≥ 45   20w w 2 ≥ 80   w 1 ≥ 0   w 2 ≥ 0

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)13 The Duality Theorem  If the primal has a finite optimal solution, so does the dual, and the optimum values of the objective functions are equal.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)14 Primal-Dual Problems   Primal problem   Fixed resources   Maximize profit   Variables:   x 1 (number of chairs)   x 2 (number of tables)   Maximize profit 45x 1 +80x 2   Subject to:   5x x 2 ≤ 400   10x x 2 ≤ 450   x 1 ≥ 0   x 2 ≥ 0   Solution:   x 1 = 24 chairs, x 2 = 14 tables   Profit = $2200   Dual Problem  Fixed profit  Minimize value   Variables:  w 1 ($ value/board of wood)  w 2 ($ value/man-hour)   Minimize value 400w w 2   Subject to:  5w w 2 ≥ 45  20w w 2 ≥ 80  w 1 ≥ 0  w 2 ≥ 0   Solution:  w 1 = $1, w 2 = $4  value = $2200

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)15 LP for n Variables n minimize Σ cj xjObjective function j =1 n subject to Σ aij xj ≤ bi, i = 1, 2,..., m j =1 n Σ cij xj = di, i = 1, 2,..., p j =1 Variables: xj Constants: cj, aij, bi, cij, di

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)16 Algorithms for Solving LP  Simplex method  G. B. Dantzig, Linear Programming and Extension, Princeton, New Jersey, Princeton University Press,  Ellipsoid method  L. G. Khachiyan, “A Polynomial Algorithm for Linear Programming,” Soviet Math. Dokl., vol. 20, pp ,  Interior-point method  N. K. Karmarkar, “A New Polynomial-Time Algorithm for Linear Programming,” Combinatorica, vol. 4, pp ,  Course website of Prof. Lieven Vandenberghe (UCLA),

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)17 Basic Ideas of Solution methods Constraints Extreme points Objective function Constraints Extreme points Objective function Simplex: search on extreme points. Interior-point methods: Successively iterate with interior spaces of analytic convex boundaries.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)18 Integer Linear Programming (ILP)  Variables are integers.  Complexity is exponential – higher than LP.  LP relaxation  Convert all variables to real, preserve ranges.  LP solution provides guidance.  Rounding LP solution can provide a non-optimal solution.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)19 Solving TSP: Five Cities Distances (dij) in miles (symmetric TSP, general TSP is asymmetric) City j=1 j=1 j=2 j=2j=3j=4j=5 i=1 i= i=2 i= i=3 i= i=4 i= i=5 i=

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)20 Search Space: No. of Tours  Asymmetric TSP tours  Five-city problem: 4 × 3 × 2 × 1 = 24 tours  Nine-city problem: 362,880 tours  14-city problem: 87,178,291,200 tours  50-city problem: 49! = 6.08×10 tours  50-city problem: 49! = 6.08×10 62 tours Time for enumerative search assuming 1 μs per tour evaluation=1.93×10 years Time for enumerative search assuming 1 μs per tour evaluation=1.93×10 55 years

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)21 A Greedy Heuristic Solution City j = 1 j = 2j = 3j = 4j = 5 i = 1 (start) i = i = i = i = Tour length = = 60 miles (non-optimal)

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)22 ILP Variables, Constants and Constraints d14 = 12 d15 = 27 d12 = 18 d13 = 10 x14 ε [0,1] x15 ε [0,1] x12 ε [0,1] x13 ε [0,1] x12 + x13 + x14 + x15 = 2 four other similar equations Integer variables: xij = 1, travel i to j xij = 0, do not travel i to j Real variables: dij = distance from i to j

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)23 Objective Function and ILP Solution 5 i - 1 Minimize ∑ ∑ xij × dij i = 1 j = 1 xij xij j=1 j=12345 i=1 i= ∑ xij = 2 for all i j ≠ i

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)24 ILP Solution d13 = 10 d45 = 6 Total length = 45 but not a single tour d54 = 6 d21 = 18 d32 = 5

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)25 Additional Constraints for Single Tour  Following constraints prevent split tours. For any subset S of cities, the tour must enter and exit that subset: ∑ xij ≥ 2 for all S, |S| < 5 i ε S j ε S Any subset Remaining set At least two arrows must cross this boundary.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)26 ILP Solution d13 = 10 d41 = 12 Total length = 53 d54 = 6 d25 = 20 d32 = 5

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)27 Characteristics of ILP  Worst-case complexity is exponential in number of variables.  Linear programming (LP) relaxation, where integer variables are treated as real, gives a lower bound on the objective function.  Recursive rounding of relaxed LP solution to nearest integers gives an approximate solution to the ILP problem.  K. R. Kantipudi and V. D. Agrawal, “A Reduced Complexity Algorithm for Minimizing N-Detect Tests,” Proc. 20 th International Conf. VLSI Design, January 2007, pp

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)28 Why ILP Solution is Exponential? LP solution found in polynomial time (bound on ILP solution) Must try all 2 n roundoff points First variable Second variable Constraints Objective (maximize)

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)29 ILP Example: Test Minimization  A combinational circuit has n test vectors that detect m faults. Each test detects a subset of faults. Find the smallest subset of test vectors that detects all m faults.  ILP model:  Assign an integer variable ti ε [0,1] to ith test vector such that ti = 1, if we select ti, otherwise ti= 0.  Define an integer constant fij ε [0,1] such that fij = 1, if ith vector detects jth fault, otherwise fij = 0. Values of constants fij are determined by fault simulation.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)30 Test Minimization by ILP n minimize Σ ti Objective function i=1 n subject to Σ fij ti ≥ 1, j = 1, 2,..., m i=1

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)31 3V3F: A 3-Vector 3-Fault Example fiji=1i=2i=3 j=1110 j=2011 j=3101 Test vector i Fault j ε Variables: t1, t2, t3 ε [0,1] Minimize t1 + t2 + t3 Subject to: t1 + t2 ≥ 1 t2 + t3 ≥ 1 t1 + t3 ≥ 1

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)32 3V3F: Solution Space Non-optimum solution t1 t2 t st LP solution (0.5, 0.5, 0.5) ILP solutions (optimum) Rounding and 2 nd ILP solution (1.0, 0.5, 0.5) Rounding and 3 rd LP solution (1.0, 1.0, 0.0)

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)33 3V3F: LP Relaxation and Rounding ε ILP – Variables: t1, t2, t3 ε [0,1] Minimize t1 + t2 + t3 Subject to: t1 + t2 ≥ 1 t2 + t3 ≥ 1 t1 + t3 ≥ 1 ε LP relaxation: t1, t2, t3 ε (0.0, 1.0) Solution: t1 = t2 = t3 = 0.5 Recursive rounding: (1) round one variable, t1 = 1.0 Two-variable LP problem: Minimize t2 + t3 subject to t2 + t3 ≥ 1.0 LP solution t2 = t3 = 0.5 (2) round a variable, t2 = 1.0 ILP constraints are satisfied solution is t1 = 1, t2 = 1, t3 = 0

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)34 Recursive Rounding Algorithm 1.Obtain a relaxed LP solution. if each variable in the solution is an integer. 1.Obtain a relaxed LP solution. Stop if each variable in the solution is an integer. 2.Round the variable closest to an integer. 3.Remove any constraints that are now unconditionally satisfied. 4.Go to step 1.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)35 Recursive Rounding  ILP has exponential complexity.  Recursive rounding:  ILP is transformed into k LPs with progressively reducing number of variables.  A solution that satisfies all constraints is guaranteed; this solution is often close to optimal.  Number of LPs, k, is the size of the final solution, i.e., the number of non-zero variables in the test minimization problem.  Recursive rounding complexity is k × O(n p ), where k ≤ n, n is number of variables.

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)36 Four-Bit ALU Circuit Initial vectors ILP Recursive rounding Vectors CPU s Vectors , , , ,

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)37 ILP vs. Recursive Rounding 0 5,000 10,000 15,000 Vectors ILP Recursive Rounding CPU s

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)38 N-Detect Tests (N = 5) Circuit Unoptimized vectors Relaxed LP/Recur. rounding ILP (exact) Lower bound Min. vectors CPU s Min. vectors CPU s c432 c c499 c c880 c8801, c1355 c c1908 c19081, c2670 c c3540 c35401, c5315 c53151, c6288 c c7552 c75522,

Spring 08, Feb 14ELEC 7770: Advanced VLSI Design (Agrawal)39 Finding LP/ILP Solvers  R. Fourer, D. M. Gay and B. W. Kernighan, AMPL: A Modeling Language for Mathematical Programming, South San Francisco, California: Scientific Press, Several of programs described in this book are available to Auburn users.  B. R. Hunt, R. L. Lipsman, J. M. Rosenberg, K. R. Coombes, J. E. Osborn and G. J. Stuck, A Guide to MATLAB for Beginners and Experienced Users, Cambridge University Press,  Search the web. Many programs with small number of variables can be downloaded free.