The Stanford Clean Slate Program A couple of platforms (Or: “Why can’t I innovate in my wiring closet?”) Nick McKeown

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Presentation transcript:

The Stanford Clean Slate Program A couple of platforms (Or: “Why can’t I innovate in my wiring closet?”) Nick McKeown GENI Engineering Conference March 4, 2008

The Stanford Clean Slate Program GENI: How to try new network architectures in my local network? PlanetLab Suitable for distributed systems using overlays Not suitable for radical network architectures Performance is limited XORP Open-source router code for Linux, FreeBSD, etc. Performance is limited Point solution OpenWRT Linux for wireless access points and routers VINI, WUSTL SPP, … Designed for large nationwide backbone infrastructure

The Stanford Clean Slate Program Outline NetFPGA  Open source networking hardware  4-ports of 1GE  Operates at line-rate  Available for $500 (university) OpenFlow  Enabling innovation on campus  Standard way to control flow-tables in commercial switches and routers  Being deployed at Stanford  Consider deploying it at your campus too

The Stanford Clean Slate Program FPGA Memory 1GE PCI CPU Memory NetFPGA Board PC with NetFPGA Hardware available from 3 rd party ~$500 (universities) PCI board, or pre-built system (desktop or rack-mount) Open source networking hardware Rack of 1U servers 96 x 1GE ports

The Stanford Clean Slate Program NetFPGA: Usage Models Types of user 1.Teachers 2.Students 3.Researchers 4.Commercial development Supported Use Models 1.Router Kit 2.Supported Modular Reference Designs 3.Free Design (or 3 rd party design) All software and designs available under BSD-like license

The Stanford Clean Slate Program NetFPGA “Router Kit” User-space development, 4x1GE line-rate forwarding FPGA Memory 1GE PCI CPU Memory OSPFBGP My Protocol user kernel Routing Table Usage #1 IPv4 Router 1GE Fwding Table Packet Buffer “Mirror”

The Stanford Clean Slate Program FPGA Memory 1GE NetFPGA “ Reference Router ” Modules in hardware PCI CPU Memory NetFPGA Driver Java GUI Front Panel (Extensible) PW-OSPF In Q Mgmt IP Lookup L2 Parse L3 Parse Out Q Mgmt 1GE Verilog modules interconnected by FIFO interfaces My Block Verilog EDA Tools (Xilinx, Mentor, etc.) 1.Design 2.Simulate 3.Synthesize 4.Download 1.Design 2.Simulate 3.Synthesize 4.Download Usage #2

The Stanford Clean Slate Program FPGA Memory 1GE NetFPGA Free Design PCI CPU Memory Usage #3 NetFPGA Driver 1GE My Design (1GE MAC is soft/replaceable) Verilog EDA Tools (Xilinx, Mentor, etc.) 1.Design 2.Simulate 3.Synthesize 4.Download 1.Design 2.Simulate 3.Synthesize 4.Download

The Stanford Clean Slate Program Resources Available  NetFPGA hardware  Linux Driver  Java GUI  Test & regression software Courseware  Undergraduate EE: Ethernet switch  Masters EE/CS: IPv4 router hardware and software Tutorials  6 tutorials worldwide in 2008  1 week Stanford summer camp

The Stanford Clean Slate Program Resources (2) Reference Designs  4x1GE NIC  4x1GE IPv4 Router  4x1GE OpenFlow (soon) User-contributed  NAT  IEEE 1588 Timing Sync  Real-time buffer monitoring  RCP (Rate Control Protocol)

The Stanford Clean Slate Program Funding Launched with funds from NSF EIA Program

The Stanford Clean Slate Program Outline NetFPGA –Open source networking hardware –4-ports of 1GE –Operates at line-rate –Available for $500 (university) OpenFlow –Enabling innovation on campus –Standard way to control flow-tables in commercial switches and routers –Being deployed at Stanford –Consider deploying it at your campus too

The Stanford Clean Slate Program Innovations in campus wiring closets Experiments we’d like to do  Mobility management  Network-wide energy management  New naming/addressing schemes  Network access control Problem with our network  Paths are fixed (by the network)  IP-only  Addresses dictated by DNS, DHCP, etc  No means to add our own processing

The Stanford Clean Slate Program OpenFlow Switching 1.A way to run experiments in the networks we use everyday. 2.Bring GENI to college campuses. A “pragmatic” compromise Allow researchers to run experiments in their network… …without requiring vendors to expose internal workings. Basics An Ethernet switch (e.g. 128-ports of 1GE) An open protocol to remotely add/remove flow entries

The Stanford Clean Slate Program Experimenter’s Dream (Vendor’s Nightmare) Standard Network Processing Standard Network Processing hw sw Experimenter writes experimental code on switch/router User- defined Processing User- defined Processing

The Stanford Clean Slate Program No obvious way Commercial vendor won’t open software and hardware development environment  Complexity of support  Market protection and barrier to entry Hard to build my own  Prototypes are flakey  Software only: Too slow  Hardware/software: Fanout too small (need >100 ports for wiring closet)

The Stanford Clean Slate Program Furthermore, we want…  Isolation: Regular production traffic untouched  Virtualized and programmable: Different flows processed in different ways  Equipment we can trust in our wiring closet  Open development environment for all researchers (e.g. Linux, Verilog, etc).  Flexible definitions of a flow  Individual application traffic  Aggregated flows  Alternatives to IP running side-by-side  …

The Stanford Clean Slate Program Controller OpenFlow Switch Flow Table Flow Table Secure Channel Secure Channel PC OpenFlow Protocol SSL hw sw OpenFlow Switch specification OpenFlow Switching

The Stanford Clean Slate Program Flow Table Entry “Type 0” OpenFlow Switch Switch Port MAC src MAC dst Eth type VLAN ID IP Src IP Dst IP Prot TCP sport TCP dport RuleActionStats 1.Forward packet to port(s) 2.Encapsulate and forward to controller 3.Drop packet 4.Send to normal processing pipeline + mask Packet + byte counters

The Stanford Clean Slate Program OpenFlow “Type 1”  Definition in progress  Additional actions  Rewrite headers  Map to queue/class  Encrypt  More flexible header  Allow arbitrary matching of first few bytes  Support multiple controllers  Load-balancing and reliability

The Stanford Clean Slate Program Secure Channel  SSL Connection, site-specific key  Controller discovery protocol  Encapsulate packets for controller  Send link/port state to controller

The Stanford Clean Slate Program Controller PC OpenFlow Access Point Server room OpenFlow OpenFlow-enabled Commercial Switch Flow Table Flow Table Secure Channel Secure Channel Normal Software Normal Datapath

The Stanford Clean Slate Program OpenFlow Usage Models 1. Experiments at the flow level  User-defined routing protocols  Admission control  Network access control  Network management  Energy management  VOIP mobility and handoff …… 2. Experiments at the packet level  Slow: Controller handles packet processing  Fast: Redirect flows through programmable hardware  Modified routers, firewalls, NAT, congestion control… 3. Alternatives to IP Experiment-specific controllers Static or dynamic flow-entries

The Stanford Clean Slate Program Example Experiment at the flow level Mobility Lots of interesting questions Management of flows Control of switches Access control of users and devices Tracking user location and motion

The Stanford Clean Slate Program Controller PC NetFPGA Laboratory Experiments at the packet level OpenFlow-enabled Commercial Switch Flow Table Flow Table Secure Channel Secure Channel Normal Software Normal Datapath

The Stanford Clean Slate Program OpenFlow Usage Models 1. Experiments at the flow level 2. Experiments at the packet level 3. Alternatives to IP  Flow-table is Layer-2 based  e.g. new naming and addressing schemes ……

The Stanford Clean Slate Program OpenFlow Consortium Goal: Evangelize OpenFlow to vendors Free membership for all researchers Whitepaper, OpenFlow Switch Specification, Reference Designs Licensing: Free for research and commercial use

The Stanford Clean Slate Program OpenFlow: Status Commercial Ethernet switches and routers  Working with six vendors to add to existing products  Expect OpenFlow “Type 0” to be available in Reference switches  Software: Linux and OpenWRT (for access points)  Hardware: NetFPGA (line-rate 1GE; available soon)  Working on low-cost 48-port 1GE switch based on Broadcom reference design Reference controller  Simple test controller  NOX controller (Martin Casado; available soon)

The Stanford Clean Slate Program Deployment at Stanford Stanford Computer Science Department Gates Building ~1,000 network users 23 wiring closets Stanford Center for Integrated Systems (EE) Paul Allen Building ~200 network users 6 wiring closets Working with HP Labs and Cisco on deployment

If you are interested in deploying OpenFlow on your campus… Please contact me!