PDACS Michelle Berger John Curtin Trey Griffin Aaron King Michael Nordfelt Jeffrey Whitted.

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Presentation transcript:

PDACS Michelle Berger John Curtin Trey Griffin Aaron King Michael Nordfelt Jeffrey Whitted

PDACS P ortable D igital A udio C odec S ystem PDACS is...

PDACS Overview PDACS will be a portable device designed for capturing, compressing, storing, playback, and retrieval of digital audio data. It will sample speech, perform real time compression, and store it in non-volatile memory. The data can then later be played back directly from the device or transferred to a PC by means of the serial port interface.

PDACS Deliverables Real-time compression of 8-bit 8KHz speech Storage & retrieval of sound files Real-time decompression of stored audio Serial interface with PC for storage and archiving GUI application that facilitates easy retrieval Built in controls for recording, playback & deletion

PDACS Features Real Time Audio Compression/Decompression Portability Immediate Playback Interface to Desktop PC Device Display Panel User-Friendly Display Interface User-Friendly PC Interface

PDACS Benefits Convenience No external media Inexpensive to produce Increased functionality Designed for the typical user

PDACS Component List ADC0804 A/D Converter AD7523 D/A Converter AT45D161 Serial Flash Memory National Semiconductor 16550DN UART Maxim 232-CPE

PDACS

PDACS

PDACS A/D Subsystem Captures analog audio from microphone input Audio sampled at 8-bit, 8 kHz Converts analog to digital data Outputs digital data to Xilinx chip

PDACS D/A Subsystem Receives decompressed digital data from compression subsystem Converts digital data back into analog signal Outputs the analog signal to either a built in speaker or a headphone jack

PDACS Compression Subsystem Real time compression/decompression of the incoming/outgoing digital data. Considering several compression schemes: –Discrete Cosine Transform –Global System for Mobile Telecom –Sliding Window (Companding and LZSS) –Vector Encoding

PDACS Memory Subsystem 2 MB Serial Flash Memory Non-volatile Serial Interface –minimizes pin usage on Xilinix chip –simplifies interface to Xilinix chip Low voltage keeps power requirements minimized

PDACS Serial Interface Subsystem Allows the device to interface with a PC Uses RS-232 Interface GUI application on the PC that allows for easy retrieval of recorded material Application allows for the archiving of data

PDACS Power Subsystem Provides power to all of the chips on the device 5V for most devices End result will be portable system

PDACS Breakdown of Work Michelle Berger - Compression & Memory systems John Curtin - Compression & Memory systems Trey Griffin - Memory & Serial Interface systems Aaron King - A/D, D/A, and Compression systems Michael Nordfelt - A/D, D/A and Serial Interface systems Jeffrey Whitted - Memory and Serial Interface systems

PDACS Schedule of Work Weeks 1-3 –Proposal and Bi-weekly 1 –Memory Xilinx Module Implementation –A/D and D/A Xilinx Module Implementation –Compression Research Weeks 4-6 –Serial Port Interface –Bi-weekly two

PDACS Schedule of Work Weeks 7-10 –Mid term presentation –NT serial port driver –Application development Weeks –Final System Integration –Testing –Final presentation and product delivery