Penn ESE680-002 Spring 2007 -- DeHon 1 ESE680-002 (ESE534): Computer Organization Day 9: February 7, 2007 Instruction Space Modeling.

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Presentation transcript:

Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 9: February 7, 2007 Instruction Space Modeling

Penn ESE Spring DeHon 2 Last Time Instruction Requirements Instruction Space

Penn ESE Spring DeHon 3 Architecture Instruction Taxonomy

Penn ESE Spring DeHon 4 Today Instructions –Model Architecture implied costs gross application characteristics

Penn ESE Spring DeHon 5 Quotes If it can’t be expressed in figures, it is not science; it is opinion. -- Lazarus Long

Penn ESE Spring DeHon 6 Modeling Why do we model?

Penn ESE Spring DeHon 7 Motivation Need to understand –How costly (big) is a solution –How compare to alternatives –Cost and benefit of flexibility

Penn ESE Spring DeHon 8 What we really want: Complete implementation of our application For each architectural alternatives –In same implementation technology –w/ multiple area-time points

Penn ESE Spring DeHon 9 Reality Seldom get it packaged that nicely –much work to do so –technology keeps moving Deal with –estimation from components –technology differences –few area-time points

Penn ESE Spring DeHon 10 Modeling Instruction Effects Restrictions from “ideal” save area Restriction from “ideal” limits usability (yield) of PE Want to understand effects –area model –utilization/yield model

Penn ESE Spring DeHon 11 Efficiency/Yield Intuition What happens when –Datapath is too wide? –Datapath is too narrow? –Instruction memory is too deep? –Instruction memory is too shallow?

Penn ESE Spring DeHon 12 Computing Device Composition –Bit Processing elements –Interconnect: space –Interconnect: time –Instruction Memory Tile together to build device

Penn ESE Spring DeHon 13 Relative Sizes Bit Operator 10-20K 2 Bit Operator Interconnect 500K-1M 2 Instruction (w/ interconnect) 80K 2 Memory bit (SRAM) 1-2K 2

Penn ESE Spring DeHon 14 Model Area

Penn ESE Spring DeHon 15 Architectures Fall in Space

Penn ESE Spring DeHon 16 Calibrate Model

Penn ESE Spring DeHon 17 Peak Densities from Model

Penn ESE Spring DeHon 18 Peak Densities from Model Only 2 of 4 parameters –small slice of space –100  density across Large difference in peak densities –large design space!

Penn ESE Spring DeHon 19 Peak Densities from Model

Penn ESE Spring DeHon 20 Efficiency What do we want to maximize? –Useful work per unit silicon –(not potential/peak work) Yield Fraction / Area (or minimize (Area/Yield) )

Penn ESE Spring DeHon 21 Efficiency For comparison, look at relative efficiency to ideal. Ideal = architecture exactly matched to application requirements Efficiency = A ideal /A arch A arch = Area Op/Yield

Penn ESE Spring DeHon 22 Width Mismatch Efficiency Calculation

Penn ESE Spring DeHon 23 Efficiency: Width Mismatch c=1, 16K PEs

Penn ESE Spring DeHon 24 Path Length How many primitive-operator delays before can perform next operation? –Reuse the resource

Penn ESE Spring DeHon 25 Reuse Pipeline and reuse at primitive-operator delay level. Path Length: How much sequentialization is allowed (required)? How many times can I reuse each primitive operator?

Penn ESE Spring DeHon 26 Context Depth

Penn ESE Spring DeHon 27 Efficiency with fixed Width w=1, 16K PEs Path Length Context Depth

Penn ESE Spring DeHon 28 Ideal Efficiency (different model) Two resources here: active processing elements operation description/state Applications need in different proportions. Application Requirement

Penn ESE Spring DeHon 29 Robust Point depend on Width w=1 w=8 w=64

Penn ESE Spring DeHon 30 Processors and FPGAs FPGA c=d=1, w=1, k=4 “Processor” c=d=1024, w=64, k=2

Penn ESE Spring DeHon 31 Intermediate Architecture w=8 c=64 16K PEs Hard to be robust across entire space…

Penn ESE Spring DeHon 32 Caveats Model abstracts away many details which are important –interconnect (day ) –control (day 24) –specialized functional units (next time) Applications are a heterogeneous mix of characteristics

Penn ESE Spring DeHon 33 Modeling Message Architecture space is huge Easy to be very inefficient Hard to pick one point robust across entire space Why we have so many architectures?

Penn ESE Spring DeHon 34 General Message Parameterize architectures Look at continuum –costs –benefits Often have competing effects –leads to maxima/minima

Penn ESE Spring DeHon 35 Admin Assignment 4 out today –Did push back due dates for 4 and 5 Reading for Monday on web –Supplemental from this month TRCAD

Penn ESE Spring DeHon 36 Big Ideas [MSB Ideas] Applications typically have structure Exploit this structure to reduce resource requirements Architecture is about understanding and exploiting structure and costs to reduce requirements

Penn ESE Spring DeHon 37 Big Ideas [MSB Ideas] Instruction organization induces a design space (taxonomy) for programmable architectures Arch. structure and application requirements mismatch  inefficiencies Model  visualize efficiency trends Architecture space is huge –can be very inefficient –need to learn to navigate