Design and Implementation of VLSI Systems (EN1600) lecture07 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.

Slides:

Advertisements

Similar presentations

Design and Implementation of VLSI Systems (EN1600)

Advertisements

VLSI Design Lecture 3a: Nonideal Transistors. Outline Transistor I-V Review Nonideal Transistor Behavior Velocity Saturation Channel Length Modulation.

Lecture 3: CMOS Transistor Theory. CMOS VLSI DesignCMOS VLSI Design 4th Ed. 3: CMOS Transistor Theory2 Outline  Introduction  MOS Capacitor  nMOS I-V.

EE466: VLSI Design Lecture 02 Non Ideal Effects in MOSFETs.

Design and Implementation of VLSI Systems (EN1600) Lecture08 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.

Introduction to CMOS VLSI Design Lecture 15: Nonideal Transistors David Harris Harvey Mudd College Spring 2004.

Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 12 Lecture 12: MOS Transistor Models Prof. Niknejad.

Introduction to CMOS VLSI Design Lecture 19: Nonideal Transistors

Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2004.

CMOS Transistor and Circuits

Introduction to CMOS VLSI Design Lecture 5 CMOS Transistor Theory

Introduction to CMOS VLSI Design MOS Behavior in DSM.

VLSI Design CMOS Transistor Theory. EE 447 VLSI Design 3: CMOS Transistor Theory2 Outline Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V.

Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley –

Design and Implementation of VLSI Systems (EN0160) Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley.

Lecture 11: MOS Transistor

VLSI Design Lecture 3a: Nonideal Transistors

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]

Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory

CSCE 612: VLSI System Design Instructor: Jason D. Bakos.

Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2004 from CMOS VLSI Design A Circuits and Systems.

Design and Implementation of VLSI Systems (EN0160) Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley.

S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Lecture 22: Material Review Prof. Sherief Reda Division of Engineering, Brown University.

Digital Integrated Circuits A Design Perspective

DC and transient responses Lezione 3

Design and Implementation of VLSI Systems (EN0160) lecture03 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.

Design and Implementation of VLSI Systems (EN1600) lecture02 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.

S. Reda EN160 SP’07 Design and Implementation of VLSI Systems (EN0160) Lecture10: Delay Estimation Prof. Sherief Reda Division of Engineering, Brown University.

EE4800 CMOS Digital IC Design & Analysis

S. Reda VLSI Design Design and Implementation of VLSI Systems (EN1600) lecture09 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008.

Introduction to CMOS VLSI Design Nonideal Transistors.

Lecture 2: CMOS Transistor Theory

VLSI design Lecture 1: MOS Transistor Theory. CMOS VLSI Design3: CMOS Transistor TheorySlide 2 Outline  Introduction  MOS Capacitor  nMOS I-V Characteristics.

© Digital Integrated Circuits 2nd Devices VLSI Devices  Intuitive understanding of device operation  Fundamental analytic models  Manual Models  Spice.

Transistor Characteristics EMT 251. Outline Introduction MOS Capacitor nMOS I-V Characteristics (ideal) pMOS I-V Characteristics (ideal)

Lecture 3: CMOS Transistor Theory

ECE 342 Electronic Circuits 2. MOS Transistors

EE213 VLSI Design S Daniels Channel Current = Rate of Flow of Charge I ds = Q/τ sd Derive transit time τ sd τ sd = channel length (L) / carrier velocity.

NOTICES Project proposal due now Format is on schedule page

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

The Devices Digital Integrated Circuit Design Andrea Bonfanti DEIB

© Digital Integrated Circuits 2nd Devices Digital Integrated Circuits A Design Perspective The Devices Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic.

Jan M. Rabaey The Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction.

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 28, 2011 MOS Transistor.

1 Slides adapted from: N. Weste, D. Harris, CMOS VLSI Design, © Addison-Wesley, 3/e, 2004 MOS Transistor Theory.

CSCE 613: Fundamentals of VLSI Chip Design Instructor: Jason D. Bakos.

ECE340 ELECTRONICS I MOSFET TRANSISTORS AND AMPLIFIERS.

ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.

VLSI System Design Lect. 2.2 CMOS Transistor Theory2 Engr. Anees ul Husnain ( Department of Electronics.

Device models Mohammad Sharifkhani.

Digital Integrated Circuits A Design Perspective

CMOS VLSI Design CMOS Transistor Theory

Introduction to CMOS VLSI Design Lecture 4: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2007.

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 19, 2014 MOS Transistor.

The MOS Transistor Polysilicon Aluminum. The NMOS Transistor Cross Section n areas have been doped with donor ions (arsenic) of concentration N D - electrons.

Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,

CP 208 Digital Electronics Class Lecture 6 March 4, 2009.

Introduction to CMOS VLSI Design CMOS Transistor Theory

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 10: September 20, 2013 MOS Transistor.

Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.

CMOS VLSI Design 4th Ed. EEL 6167: VLSI Design Wujie Wen, Assistant Professor Department of ECE Lecture 3A: CMOs Transistor Theory Slides adapted from.

The Devices: MOS Transistor

3: CMOS Transistor Theory

VLSI System Design Lect. 2.1 CMOS Transistor Theory

VLSI Design CMOS Transistor Theory

Lecture 3: CMOS Transistor Theory

CP-406 VLSI System Design CMOS Transistor Theory

Lecture 3: CMOS Transistor Theory

Lecture 3: CMOS Transistor Theory

Presentation transcript:

Design and Implementation of VLSI Systems (EN1600) lecture07 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey Pearson - Baker Wiley]

MOS transistor theory Schedule for 4 lectures –Ideal (Shockley) Model –Non-ideal model –Inverter DC characteristics –SPICE

gate-oxide-body sandwich = capacitor Operating modes Accumulation Depletion Inversion The charge accumulated is proportional to the excess gate-channel voltage (V gc -V t )

The MOS transistor has three regions of operation Cut off V gs < V t Linear (resistor): V gs > V t & V ds < V SAT =V gs -V t Current prop to V ds Saturation: V gs > V t and V ds ≥ V SAT =V gs -V t Current is independent of V ds NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD = 2.5V, VT = 0.4V

How to calculate the current value? MOS structure looks like parallel plate capacitor while operating in inversion –Gate – oxide – channel Q channel = CV C = ε ox WL/t ox = C ox WL (where C ox =ε ox /t ox ) V = V gc – V t = (V gs – V ds /2) – V t

Carrier velocity is a factor in determining the current Charge is carried by electrons Carrier velocity v proportional to lateral E-field between source and drain v = μE μ called mobility E = V ds /L Time for carrier to cross channel: t = L / v

I=Q/t Now we know –How much charge Q channel is in the channel –How much time t each carrier takes to cross

In linear mode (V gs > V t & V ds < V gs -V t ) Can be ignored for small V ds  For a given V gs, I ds is proportional (linear) to V ds

In saturation mode (V gs > V t and V ds ≥ V gs -V t )  Now drain voltage no longer increases current pinched off

Operation modes summary

Transistor capacitance  Gate capacitance: to body + to drain + to source  Diffusion capacitance: source-body and drain-body capacitances

Gate capacitance as a function of Vgs

Source/Drain diffusion capacitance C sb, C db Undesirable, called parasitic capacitance Capacitance depends on area and perimeter –Use small diffusion nodes –Comparable to C g –Varies with process Bottom Side wall Channel Source N D Channel-stop implant N A 1 SubstrateN A W x j L S

Summary Covered ideal (long channel) operation (Shockley model) of transistor Next time: short-channel transistors TA