A DSP-Based Ramp Test for On-Chip High-Resolution ADC Wei Jiang and Vishwani D. Agrawal Auburn university

Motivation Testing analog-to-digital converter (ADC) – Linear ramp to cover full range of ADC – Slow slope for static testing – Histogram-based non-linearity error Proposed DSP-based ramp test – Characterizing ADC using linear function – Estimating coefficients of the function ICIT'112

Non-linearity Error Least significant bit (LSB) Signal values at lower and upper edges of each codes Non-linearity errors – Differential non-linearity (DNL) – Integral non-linearity (INL) ICIT'113

Typical ADC Testing Architecture ICIT'114 * F. F. Dai and C. E. Stroud, “Analog and Mixed-Signal Test Architectures,” Chapter 15, p. 722 in System-on-Chip Test Architectures: Nanometer Design for Testability, Morgan Kaufmann, 2008.

Ramp Test Structure for ADC ICIT'115 Similar to structures for histogram approach

Ramp Test Histogram Test for high-resolution ADC – A large amount of code to be tested – Multiple samples for each code – Very low-slope ramp testing signals required Comparable to thermal noise Proposed Approach – Linear function to characterize ADC – Coefficients of the function are easy to calculate – Only part of codes measured; speed up testing time ICIT'116

Linear Function Linear ramp function – T is the sampling time Measured output – K is the maximum code Reconstructed ramp function using measured samples ICIT'117

Division of Measurements Divided full-range of ADC codes into two equal-size sections Sum up measurements of each section Lower bound M(0) and upper bound M(K) are discarded because of possible out-of-range measurements ICIT'118

Calculation of Coefficients Two syndromes obtained from sums LSB, K and T are all known parameters Estimated coefficients calculated from syndromes ICIT'119

BIST Steps - measurements Reset ramp testing signal generator Detect first non-zero ADC output (lower- bound of samples) Measure all subsequent samples Stop at the maximum ADC output (upper- bound of samples) DSP collects all valid measurements and start to processing data ICIT'1110

BIST Steps – processing data Divide measured samples into two equal-size parts Accumulate measurements of each part to obtain two sums Calculate two syndromes from two sums Calculate two estimated coefficients of the linear ramp function (Optional) Compare each measured data to estimated one from ramp function ICIT'1111

Design of Ramp Signal Generator ICIT'1112 Switch for resetting ramp II I/30 ΔV+Vth ΔVΔV Range: 0 v~ Vdd-ΔV

Simulation Results ICIT'1113

Simulation Results ICIT'1114

Other considerations Minimal number of samples – More samples, less quantization noise, more accurate estimation – Not all codes need to be sampled in order to reduce testing time – At least 2 N-2 samples are found necessary in practice The same idea may be used with low-frequency sinusoidal testing signals instead of ramp signal – More overhead and complexities with sinusoidal generator ICIT'1115

Conclusion Proposed Approach – For high-resolution ADC – Less samples required comparing to histogram approach – Simple algorithm to calculate coefficients and make estimation 16ICIT'11

THANK YOU ICIT'1117