Tomas Bengtsson 1 Test Research at Jönköping University Tomas Bengtsson

2 Outline System Design Research in Jönköping Test Research in Jönköping Crosstalk faults System Level Fault Models

Tomas Bengtsson 3 NoC research in Jönköping

Tomas Bengtsson 4 NoC research in Jönköping Routing Schemes in NoCs with Mixed Quality of Service Traffic

Tomas Bengtsson 5 NoC research in Jönköping Routing Schemes in NoCs with Mixed Quality of Service Traffic Irregular Structures and Application specific Deadlock free routing in Mesh NoC

Tomas Bengtsson 6 NoC research in Jönköping Routing Schemes in NoCs with Mixed Quality of Service Traffic Irregular Structures and Deadlock free routing in Mesh NoC Mapping Applications to NoC Systems

Tomas Bengtsson 7 NoC research in Jönköping Routing Schemes in NoCs with Mixed Quality of Service Traffic Irregular Structures and Deadlock free routing in Mesh NoC Mapping Applications to NoC Systems Test of the infrastructure

Tomas Bengtsson 8 Issues in Noc Test NoC test Resources Test access Test method for resource Infrastructure Interconnection Links Switches

Tomas Bengtsson 9 Test of interconnections Test for crosstalk faults is needed for relative long wire on Deep Submicron chips NoC chips gains several advantages of being Global Asynchronous Local Synchronous Switch Switch Switch Switch

Tomas Bengtsson 10 Test of interconnections Phase difference between clocks are non- deterministic –Effects of a fault varies Crosstalk faults can cause changed delay and glitches on wires Switch Switch Link is asynchronous

Tomas Bengtsson 11 Test for Delay Too much delay on data might give erroneous transfer sometime We have presented a method for detect such faults with purely digital BIST hardware Transmitting switch Ready To Receive Write Data clk T clk R Receiving switch Write Data clk R Write Data a b clk R

Tomas Bengtsson 12 Test for Glitches Glitches might make transmitter and receiver lose synchronization –Lost packets sometime –Dropped packets sometimes Difficultness is to don’t lose this synchronization during test Transmitting switch Ready To Receive Write Data clk T clk R Receiving switch Victim wire Controller reset Glitch detector Glitch detector

Tomas Bengtsson 13 System Level Fault Model Is it possible to have some fault models on a system without knowing anything of its implementation? –Application specific fault models telling what can go wrong –In a NoC-switch you can for example think of fault types like Packets are going in wrong direction Packets gets erroneous

Tomas Bengtsson 14 System Level Fault Model Packets are going in wrong direction –Example: A packet coming from north supposed to go west goes instead south –Which test vectors detects this fault? We have made experiment on a small crossbar which is a simplification of a NoC switch with three types of system level fault models –Experiments shows that there are some potential for such fault models