Viterbi Decoder: Presentation #2 Omar Ahmad Prateek Goenka Saim Qidwai Lingyan Sun M1 Overall Project Objective: Design of a high speed Viterbi Decoder Stage 2: 26 Jan Architecture Proposal Design Manager: Yaping Zhan

Status Design Proposal (finalized) Architecture Proposal (done) Final Algorithm Description Mapping of Algorithm into hardware High level simulation/emulation in Matlab Behavioral Verilog simulation and test bench To be done: Floor Plan Gate Level Design Component Layout Chip Layout Spice Simulation of Entire Chip , Integrated Circuits Design Project

Viterbi Algorithm Description Branch Calculation Unit Add Compare Select Unit Maximum Likelihood Path Search Trace FIFOTrace Back Control Unit Overview of Algorithm , Integrated Circuits Design Project Aim: Retrieve data from the disk Algorithm based upon maximum likelihood detection , Viterbi Decoder , BADGOOD

Viterbi Algorithm Description Pseudo-Code Step 1: Send it to the Branch and Compare Unit (BCU) Subtract it with 16 constants C = [ ] Square each result Step 2: Send the results to Add Compare Select Unit (ACU) Select minimum of 2 results, add using feedback loop and send to ML Store position of minimum selected and send to trace back Step 3: Maximum Likelihood Path Search (ML) Find minimum value of all inputs Find and store position Step 4: Trace Back Go back along the path to find the correct input sequence For each digit in the input sequence do: , Integrated Circuits Design Project

D D … … D D D D DD D D … … ……….. … C0C1C2C3Cn-1Cn ……….. Control Logic Input Output BCU ACS ML Search FIFO & trace back Input_valid Clock Vdd Gnd Output_valid Reset Viterbi Algorithm Description Flow-chart

Branch and Compare Unit (BCU) Add Compare Select Unit (ACS) , Integrated Circuits Design Project C0C1C2C3 BCU C0C1C2C3 C0C1C2C3 C0C1C2C3 Input ACS

Maximum Likelihood Path Search (ML) , Integrated Circuits Design Project ML Search

Trace Back Unit , Integrated Circuits Design Project DD D D DD D D DD D D DD D D DD D D DD D D ………………………………………………….

18-525, Integrated Circuits Design Project Matlab Simulation

18-525, Integrated Circuits Design Project Matlab Simulation (Test Results)

18-525, Integrated Circuits Design Project Verilog Simulation

18-525, Integrated Circuits Design Project Verilog Simulation (Test Result) Match with Matlab Result

Questions? , Integrated Circuits Design Project