Presenting: Itai Avron Supervisor: Chen Koren Final Presentation Spring 2005 Implementation of Artificial Intelligence System on FPGA

Project Goals Creating a VHDL design of a Neural Network Comparison Vs. software implementation (Matlab)

Background Neural Network is a Learning Machine It is build from Neurons (Perceptrons), which holds the knowledge of the system within their inter-connection strength Every Neuron Implement the Active Function:

System Interface Input: - Image (16x16 pixels) - Weights Output: - A number between 0-9 (4 bit vector)

System Architecture

Net Architecture

Controller – Flow Diagram

Neuron Architecture

Hardware Requirements Neuron : ROM – 2^15*20 bit = 80KB 257 Multipliers (20 bit input) 256 Adders (40-48 bit input) Network : Memory – Used : 17*(256+1)*20 bit = 10.7KB In Reality : 32 Lines => 20.1KB System : Image registers – 20*256 bit = 640B

Simulations Neuron:

Neural Network

Neural Network (Cont.)

System

System (Cont.)

Synthesis Synthesis on 3 different FPGA 1.xc2v bg575 -> MHz 2. xc2v fg256 -> MHz 3. xc2vp20-6-fg676 -> MHz  Frequency = 80MHz

Comparison Matlab : 114 errors out of 1000 pictures Calculation time: sec VHDL : 114 errors out of 1000 pictures Calculation time: 1000*43/80MHz = msec  The hardware is about 1000 times faster!!

Improvement Suggestion Change numbers resolution to less than 18 bit (max input bits in Xilinx components) Implement learning is HW