ACSD Conference, Augsburg, Summer Flat Arbiters Andrey Mokhov 1, Victor Khomenko 2, Alex Yakovlev 1 1 School of Electrical, Electronic and Computer Engineering 2 School of Computing Science Newcastle University {andrey.mokhov, victor.khomenko, ncl.ac.uk
ACSD Conference, Augsburg, Summer Outline N-way arbiters Flat arbitration 3-way flat arbiter General solution Conclusions Outline
ACSD Conference, Augsburg, Summer N-way arbiters
ACSD Conference, Augsburg, Summer N-way arbiters STG specifications: standard vs. early protocols At most one grant can be high at any moment of time Standard protocol The next grant can be issued as soon as the previous request is removed Early protocol
ACSD Conference, Augsburg, Summer N-way arbiters 2-way Mutual-Exclusion (ME) element r 1 +, r 2 +, g 1 +, r 2 - More complex protocol than a 2-way arbiter, permitting trace
ACSD Conference, Augsburg, Summer N-way arbiters Solutions review Locking arbiters –Concurrent arbitration –Timing assumptions –Limited information (only winner is detected) Token ring arbiters –Concurrent arbitration, high scalability –Latency –Unordered client service Balanced tree of 2-way arbiters –Simplicity –Sequential arbitration (but see [Josephs, Yantchev 1996]) –Limited information (only winner is detected) Flat arbiters –Concurrent arbitration, speed-independent –Complicated, not practical for large values of N –Complete information on the order of requests
ACSD Conference, Augsburg, Summer Outline N-way arbiters Flat arbitration 3-way flat arbiter General solution Conclusions Outline
ACSD Conference, Augsburg, Summer Flat arbitration The ME elements structure is flat (all pairwise arbitrations are performed concurrently) The decision logic does not contain ME elements and hence has bounded latency
ACSD Conference, Augsburg, Summer Flat arbitration Matrix of ME elements detects complete information on order of the received requests (arbitration matrix). Decision logic is speed-independent and has bounded latency. It decides which grant to issue according to the arbitration matrix. Composition of environment STG, ME element STGs, and decision logic STG is a deadlock free, speed-independent STG (formally verified in framework).
ACSD Conference, Augsburg, Summer Outline N-way arbiters Flat arbitration 3-way flat arbiter General solution Conclusions Outline
ACSD Conference, Augsburg, Summer way flat arbiter
ACSD Conference, Augsburg, Summer way flat arbiter (implementation with deadlocks) 3-way flat arbiter 2 deadlock traces: 1) ra+, rb+, rc+, ab+, bc+, ca+ 2) ra+, rb+, rc+, ba+, ac+, cb A CB
ACSD Conference, Augsburg, Summer STG specification (with deadlocks) 3-way flat arbiter
ACSD Conference, Augsburg, Summer STG specification (deadlocks resolved) 3-way flat arbiter ME elements are used in a non- standard way! ra+ rb+ rc+ ab+ bc+ ca+ ga+ ra−
ACSD Conference, Augsburg, Summer gC implementation 3-way flat arbiter
ACSD Conference, Augsburg, Summer STG-driven approach limitations Flat arbitration STG is large and complicated if N>3 The number of deadlocks grows extremely fast: –2 for N=3 –40 for N=4 –904 for N=5 –32048 for N=6 Logic decomposition is required for N>3
ACSD Conference, Augsburg, Summer Outline General solution Flat arbitration 3-way flat arbiter study General solution Conclusions Outline
ACSD Conference, Augsburg, Summer Basic notions General solution Arbitration matrix: Boolean N x N matrix with A[i][j]=1 iff request[i] won arbitration with request[j] Request[k] is observable in A iff it has at least one win A is stable w.r.t. request[k] iff all the arbitrations in which it participates have completed A is stable iff it is stable w.r.t. all the observable requests A may contain cycles leading to deadlocks
ACSD Conference, Augsburg, Summer Acyclic arbitration matrix B Request[k] is dominated (denoted dom[k]) iff it has lost an arbitration with some smaller request[j] (j<k) Request[k] is non-dominated (denoted ndom[k]) iff it has won all the arbitrations with smaller requests Arbirtration martix B is defined as: Matrix B properties: –B can obtained from A by reversing some of the arbitration results –B is acyclic; if A is stable then B has a winner –The winner is observable in A, and A is stable w.r.t. it General solution
ACSD Conference, Augsburg, Summer Top-level view of generic N-way flat arbiter General solution A B
ACSD Conference, Augsburg, Summer way decomposed solution (general approach) General solution
ACSD Conference, Augsburg, Summer way flat arbiter (gC-implementation) General solution [ga↑] = ab (ac + ca bc) (ad + da (bd + cd)) [ga↓] = ab’ ac’ ad’ [gb↑] = ba (bc + cb ac) (bd + db (ad + cd)) [gb↓] = ba’ bc’ bd’ [gc↑] = ca cb (cd + dc (ad + bd)) [gc↓] = ca’ cb’ cd’ [gd↑] = da db dc [gd↓] = da’ db’ dc’ In general, the height of the transistor stack is: (2N-3) in the set network (N-1) in the reset network
ACSD Conference, Augsburg, Summer Outline General solution Flat arbitration 3-way flat arbiter study General solution Conclusions Outline
ACSD Conference, Augsburg, Summer Conclusions The work presents a new type of arbiters –Work with global information about pairwise arbitrations –All the ME elements work in parallel –Use ME elements in a non-standard way Practical circuits for 3-way case, theoretical polynomial-size construction for general case All the provided solutions are formally proven to be deadlock-free and speed-independent The developed framework allows for other decision policies (e.g. when up to m < N requests can be granted) Future work –Further optimisation of N-way flat arbiters –Investigation of opportunities opened by flat arbitration scheme (possibility to generate total order of the received events)
ACSD Conference, Augsburg, Summer Thank you! Questions?