1 San Jose State University Department of Electrical Engineering EE 166 Project Spring 2003 Phase Frequency Detector (PFD) Prof. David Parent Group Members:Marcella Grant Robert Shen Han Duong Jeremiah Martin

2 OUTLINE Introduction Specifications Design Flow Results Conclusion

3 What is a PFD? Component used in a PLL that compares two signals. Evaluates Phase and Frequency The output voltage gives the information of the phase and frequency differences of two signals.

4 Specifications Process:AMI06 Frequency:≥ 200 MHz Power:≤.25 Watts Duty Cycle:50% VDD:5 V Inputs:2 Outputs:2

5 Schematic of PFD

6 Design Flow

7 Transistor Level of PFD

8 Test Bench

9 Layout View

10 LVS Report

11 Transient Analysis

12 DC Analysis

13 Results

14 Conclusion Successfully Designed and Implemented PFD for our PLL project. Met all Specifications.