CSE351 Course Project Tutorial By Dongyuan Zhan

Objectives The three projects will lead you to eventually create your own prototype OS on a bare-system FPGA board. Gain genuine understanding of the OS kernel principles from hands-on experience. Practice efficient teamwork and effective project management skills that make your work splendid. 6/22/2015CSE351 Course Project Tutorial 2

6/22/2015 CSE351 Course Project Tutorial 3 Overview

One Lab + Three Projects (on a team basis, accounting for 40% of your final grade) –Pre-project Lab (0%, by 09/21) : to prepare you for the projects –Project I (5%, by 10/05): to design a timer interrupt handler –Project II (20%, by 11/13): to devise multithreading and scheduling mechanisms –Project III (15%, by 12/07): to provide a synchronization mechanism for the coordination among multiple threads 6/22/2015 CSE351 Course Project Tutorial 4 Tasks

18 teams have been formed, with 2-3 members in each group sets/ /detail/ Each group should have a team leader who schedules and coordinates group events and submits your work to the hand-in system. Each team will be provided ≥2 FPGA boards. You can use your personal computer or a Lab machine to manipulate the boards, as long as the required software is installed. 6/22/2015 CSE351 Course Project Tutorial 5 Teams

Hardware –the Altera DE-2/DE-1 board Software –Quartus-II Web Edition 11.0sp1 »It also includes the Nios-II v11.0 Software Build Tools for Eclipse » -ii-we/11.0sp1 (download registration required) -ii-we/11.0sp1 –Virtualbox (only for Mac users) » %20build%20instructionshttp:// %20build%20instructions 6/22/ CSE351 Course Project Tutorial Infrastructure

Software –USB Blaster Driver »It enables DE-2 to communicate with your computer »How to install it can be found at WINXP: blaster/dri-usb-blaster-xp.html blaster/dri-usb-blaster-xp.html WIN7/VISTA: blaster/dri-usb-blaster-vista.html blaster/dri-usb-blaster-vista.html 6/22/2015 CSE351 Course Project Tutorial 7 Infrastructure

Software –Nios-II Soft-Core CPU »It is essentially a VHDL/Verilog design that configures the FPGA to function as a CPU. »DE2 Version: II.zip II.zip »DE1 Version: II.zip II.zip 6/22/2015 CSE351 Course Project Tutorial 8 Infrastructure

6/22/2015 CSE351 Course Project Tutorial 9 FPGA Power Button USB Blaster Port Altera DE-2 Board

6/22/2015 CSE351 Course Project Tutorial 10 FPGA Power Button USB Blaster Port Altera DE-1 Board

6/22/2015 CSE351 Course Project Tutorial 11 Download the Nios-II Soft CPU to the FPGA Platform – _2011:Pre_Project_Lab#Download_the_Nios- II_Soft_CPU_to_the_FPGA_Platformhttp://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Download_the_Nios- II_Soft_CPU_to_the_FPGA_Platform Create a Nios-II C Project – _2011:Pre_Project_Lab#Create_a_Nios-II_C_Projecthttp://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Create_a_Nios-II_C_Project Build the Project – _2011:Pre_Project_Lab#Build_the_Projecthttp://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Build_the_Project Steps

6/22/2015 CSE351 Course Project Tutorial 12 Observe the FPGA Platform Output – _2011:Pre_Project_Lab#Observe_the_FPGA_Platform _Outputhttp://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Observe_the_FPGA_Platform _Output Debug the Project – _2011:Pre_Project_Lab#Debug_the_Projecthttp://cse.unl.edu/~dzhan/wiki/index.php5/Cse351:Fall _2011:Pre_Project_Lab#Debug_the_Project Steps

Pre-Lab (by Sep. 21) –No submission is required Project I (by Oct. 5) –The design and report need to be submitted Project II (by Nov. 13) –The design and report need to be submitted Project III (by Dec. 7) –The design and report need to be submitted 6/22/ CSE351 Course Project Tutorial Milestones

Following is the grading criteria with a total of 100 points for any projects. But different projects may carry different weights in your final grade. –Project report: 50% –Correctness of the program: 40% –Detailed source code comments and README: 10% Typically, all members in a team will get the same grade for a project, unless the team leader or other members report to the lab TA that someone contributes little to the project and he/she should get only a certain percentage (e.g., 90%) of the team’s grade. 6/22/2015 CSE351 Course Project Tutorial 14 Grading Criteria

Start as early as you can! Do good project management (e.g., risk anticipation) – Do efficient teamwork Use version control system to manage your source code –SVN/Mecurial/Git (on Windows/Unix) – Be active in discussing with the TAs 6/22/2015 CSE351 Course Project Tutorial 15 Some Suggestions for Your Success

Nios-II Software Developer's Handbook – II_Handbook.pdfhttp://cse.unl.edu/~dzhan/wiki/images/Nios- II_Handbook.pdf Instruction Set Reference for Nios-II Soft CPUs – Reference_for_Nios-II_Soft_CPUs.pdfhttp://cse.unl.edu/~dzhan/wiki/images/Instruction_Set_ Reference_for_Nios-II_Soft_CPUs.pdf Hardware Abstraction Layer API Reference – action_Layer_API_Reference.pdfhttp://cse.unl.edu/~dzhan/wiki/images/Hardware_Abstr action_Layer_API_Reference.pdf 6/22/2015 CSE351 Course Project Tutorial 16 Resources

Using Assembly in the C Source – y_in_the_C_Source.pdfhttp://cse.unl.edu/~dzhan/wiki/images/Using_Assembl y_in_the_C_Source.pdf C & ASM in Nios-II – Nios-II.pdfhttp://cse.unl.edu/~dzhan/wiki/images/C%26ASM_in_ Nios-II.pdf Altera Document Center – Altera Development Forum – 6/22/2015 CSE351 Course Project Tutorial 17 Resources

Enjoy Your Course Projects! 6/22/2015 CSE351 Course Project Tutorial 18 Q & A