Asynchronous Sequential Circuits

Asynch. vs. Synch. Asynchronous circuits don’t use clock pulses state transitions by changes in inputs. Storage Elements: Clockless storage elements or Delay elements. In many cases, as combinational feedback.  Normally much harder to design.

Asynch. Sequential Circuit x1 z1 x2 z2 inputs outputs Combinational Circuit xn zm y1 Y1 y2 Y2 Next State Current State yk Yk delay delay delay

Asynch. Sequential Circuit yi = Yi in steady state (but may be different during transition) Simultaneous change in two (or more) inputs is prohibited. The time between two changes must be less than the time of stability.

Advantages and Disadvantages Low power High performance No need for clock Disadvantages: Complexity of design process.

Analysis y1 Y1 x y2 Y2 Find feedback loops and name feedback variables appropriately. Find boolean expressions of Yi’s in terms of yi’s and inputs. Y1 = x.y1 + x’.y2 Y2 = x.y1’ + x’.y2

Analysis Draw a map: rows: yi’s columns: inputs entries: Yi’s x x x y1 y2 1 y1 y2 1 y1 y2 1 00 00 1 00 00 01 01 1 01 1 1 01 11 01 11 1 1 11 1 11 11 10 10 1 10 10 00 10 Y1 = x.y1 + x’.y2 Y2 = x.y1’ + x’.y2 (Transition Table)Y1 Y2

Analysis To have a stable state, Y must be = y (circled) x y1 y2 1 00 00 01 01 11 01 (Transition Table) Y1 Y2 11 11 10 10 00 10 At y1y2x = 000, if x: 0  1 then Y1Y2: 00  01 then y1y2 = 01 (2nd row): stable.

Analysis In general, if an input takes the circuit to an unstable state, yi’s change until a stable state is found. x y1 y2 1 00 00 01 01 11 01 General state of circuit: y1y2x: There are 4 stable states: 000, 011, 110, 101 and 4 unstable states. 11 11 10 10 00 10

State Table As synchronous: 00 01 11 10 00 01 11 01 00 10 11 10 next state present state 00 01 11 10 00 01 11 01 00 10 11 10

Flow Table As Transition Table (but with symbolic states): x a b c d 1

Flow Table: Example 2 Two states, two inputs, one output. ,0 ,1 x1 x2 00 01 11 10 Each row has more than one stable state. If x1 = 0, state is a. If x1x2 = 00  x1x2 = 10, then state becomes b. For x1x2 = 11, state is either a or b. If previously in x1x2 = 01, keeps state a, If previously in x1x2 = 10, keeps state b. Reminder: cannot go from 00 to 11.

Circuit Design From flow table to circuit: Assign a unique binary value to each state, a b ,0 ,1 x1 x2 00 01 11 10 1 ,0 ,1 x1 x2 00 01 11 10 y x1 x2 x1 x2 00 11 10 00 11 10 01 01 y y 1 1 1 1 1 1 Map for output z (=x1x2y) Map for output Y (=x1x2’+x1y)

Circuit Diagram z = x1x2y x1 x2 Y Y = x1x2’+x1y y

Critical Race: Race Condition If two (or more) state variables change in response to a change in an input, there is a race condition. E.g. from 00 to 11, due to delays 00  01  11 OR 00  10  11. Critical Race: If final steady state depends on the order of changes in state vars.

Race: Examples Noncritical Cases: 00  11 00  01 00  01  11 y1y2 1 y1y2 1 00 00 11 00 00 11 01 11 01 01 11 11 11 01 10 11 10 11 00  11 00  01 00  01  11 00  11  01 00  10  11 00  10  11  01

Critical Cases: Race: Examples 00  11 00  11 00  01  11 00  01 y1y2 1 y1y2 1 00 00 11 00 00 11 01 11 01 01 11 11 11 11 10 10 10 10 00  11 00  11 00  01  11 00  01 00  10 00  10

Instability Y = (x1 y)’ x2 For x1x2 = 11, there is no steady state. 00 11 10 01 y For x1x2 = 11, there is no steady state.  Oscillation. For x1x2 = 11, Y = y’  unstable. 1 1 1 1

No-Race State Assignment Must assign binary values to states such that: one change in an input may not cause two changes in state variables. (because due to delays, one of the variable change sooner and may stay in an unwanted stable state). From a, if x1x2 = 10  11, must go to c and stay there. But by the following assignment, it may go to b and stay there. a b x1 x2 00 01 11 10 c 00 01 a b c 11 a and b must be different in one bit, a and c must be different in one bit.

No-Race State Assignment Impossible  add one more row. x1 x2 00 11 10 01 a a b d a b a b b c 00 01 a b c d c c c c d a - - d is an intermediate (unstable) state. - means any value can be assigned (Except d=10). c d 11 10

Example 2 a b x1 x2 00 01 11 10 d c a b c 00 01 11 d 10 If there were no diagonal transition, it would be possible Impossible  add some more rows.

Example 2 a b c d b is adjacent to a, c, d c  a through g 1 b y1 y2 00 01 11 10 y3 c g e f d x1 x2 00 11 10 01 a = 000 b a e a b = 001 b d b a b is adjacent to a, c, d c  a through g a  d through e d  c through f c = 011 c g b c g = 010 - a - - 110 - - - - a b c 00 01 11 d 10 f = 111 c - - c d = 101 f d d f e = 100 - - d -