Group M3 Nick Marwaha Craig LeVan Jacob Thomas Darren Shultz Project Manager: Zachary Menegakis March 16, 2005 MILESTONE 8 Functional Blocks DSP 'Swiss Army Knife' Overall Project Objective: General Purpose Digital Signal Processing Chip

STATUS Design Proposal (Done) Architecture (Done) Size Estimates/Floorplan/Verilog (Done) Gate Level Design (99%) Layout (65%) To Be Done Complete Top Level Wiring of FP Multiplier, Adder, etc. Chip Level Wiring

DESIGN DECISIONS Booth Wallace Tree Multiplier Redesigned Layout to allow for abutment ALL inputs come from the top ALL outputs leave from the bottom Eliminates need for interconnects between adjacent multipliers

LAYOUT – PPGen7

LAYOUT REG BOOTH DECODER

LAYOUT – Booth Wallace

LAYOUT 3:2 COMPRESSOR COMPARATOR

FLOORPLAN BEFORE

FLOORPLAN AFTER New Floorplan is currently being changed due to DSP discoveries

PROBLEMS & QUESTIONS May need a slightly modified version of the multiplier for corners New discoveries regarding DSP FP Divide MAY turn into delays which brings in more complex clocking issues (means more registers instead) If true we may be able to add back complete comb filter Waiting for verification from any of 3 professors – have been waiting a while