POWER ANALYSIS Sai Siddharth Kumar Dantu ELEC7770 Advanced VLSI Design Team Project Advisor: Dr. V Agrawal.

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Presentation transcript:

POWER ANALYSIS Sai Siddharth Kumar Dantu ELEC7770 Advanced VLSI Design Team Project Advisor: Dr. V Agrawal

Objective To perform the power analysis of a 32 bit processor.

Power components in CMOS circuit V DD Ground CLCL R on R=large v i (t) v o (t) Dynamic power Short circuit power Leakage power Power =CV DD 2

Components of Power Dynamic –Signal transitions Logic activity GlitchesShort-circuitStatic –Leakage P total =P dyn + P stat P tran + P sc + P stat

What I have done so far Used Jins’s tool to evaluate the power of the ALU block of the processor.

Clock period applied is 20ns Random vectors applied are 1000

Results Minimum leakage power observed : 33438pW Maximum leakage power observed : 37304pW Minimum dynamic power observed : 73.67μW Maximum dynamic power observed : μW

Average dynamic power μW Avg short circuit power μW Average leakage power pW Total average power μW Maximum total power μW

Results Percentage of dynamic power present in the total average power is 82.42% Percentage of leakage power is % Percentage of short circuit power is 17.55%.

Work still to be done The power analysis of the entire processor has to be done.

THANK YOU