Chapter 3 Continued Logic Gates Logic Chips Combinational Logic Timing Sequential Logic Flip Flops Registers Memory State Machines.

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Presentation transcript:

Chapter 3 Continued Logic Gates Logic Chips Combinational Logic Timing Sequential Logic Flip Flops Registers Memory State Machines

CMOS Device - Inverter p channel device n channel device CMOS Inverter 3-5 volts

Basic Logic Gates

2 BIT Decoder

Truth Tables A B C | E | | | | | | | | 1 What logic function does this represent?

DeMorgan’s Theorem Not A and Not B = Not (A or B) Not A or Not B = Not (A and B) Can we prove this with Truth Tables?

Complete 74x139 Decoder

74x138 3-to-8-decoder symbol

2-to-1 MUX MUX Circuit Case: S=0 MUX Symbol

4-to-1 MUX Logic Symbol

F D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 ABC AABCBC 8 to 1 MUX

Standard Symbols for Multiplexers 8 to 1 Vector(2) of 4 to 1 Vector(4) of 2 to 1

1 Bit Full Adder