1 Dielectrics: - Epitaxial growth. Single crystal. Batch to single wafer. - Silicon Dioxide (Oxide). Alternative to batch furnace. - SACVD Oxides: BPSG (PMD), FSG, USG (IMD), TEOS/03 - Silicon Nitride Conductors: - mainly Tungsten. High aspect ratio plugs. Single wafer processing. Chemical Vapor Deposition

2 The most critical process in IC manufacturing Patter transfer process Leading edge (sub-wavelength lithography): 248nm light to pattern 130nm features - phase shifting masks/reticles - optical proximity correction Next generation: 193nm, 57nm, 13nm Lithography

3 Direct Step on Wafer (DSW) Aligner Optical Configuration

4 Comparison of Step and Repeat vs. Step and Scan Lithography tool types

5 Lithography: Alignment and Exposure (Stepper/Scanner)

6 Characteristics of Negative and Positive Resists

7 Photoresist Develop Positive Resist

8 Wet (chemical bath) for > 3 microns or Dry (plasma reactor) < 3 microns Conductors (31%), polysilicon (25%), oxide etch (44%) Metal etch wph. Etch (material removal)

9 Applied Materials 5000 Etch Process Chamber Source: Applied Materials (AMAT)

10 The Plasma The plasma supplies etchants which must remove the film selectively; Ideally the mask and substrate are not attacked. Source: D.L. Flamm, 1996

11 Etch Chemistries Source: D.L. Flamm, 1996

12 Etch Metal Etch typically dry (Plasma Reactor) etch * Al to resist etch selectivity: 3:1

13 Photolithography Process Flow Chart

14 Oxide and Copper CMP Processing Why CMP for copper? - because no-one can figure out how to etch copper at low temperature. 3 Steps for Deposition 1. CU barrier (Ta, TaN) using PVD 2. CU seed using PVD 3. CU bulk using ECD CMP (oxide) - used with AL today 1. Deposit blanket metal AL DEP SL AL 2. Litho (expose and develop) and etch SL 3. Oxide Deposition (CVD) Oxide SL AL 4. CMP (grind down, flat) OX Oxide AL CMP (for Copper) 1. Deposit blanket oxide Oxide SL OX 2. Litho and etch oxide SL 3. Blanket Copper Deposition CU SL OX 4. CMP (grind down and flatten) CU OX

15 Doping process (changes the electrical characteristics of the material) Creates the elements of the transistors Fires ions of dopant material into the wafer P (positive) dopants OR N (negative) dopants Older doping process: diffusion Need to repair damages from bombardment: anneal or Rapid Thermal Processing (RTP) Ion Implant

16 Periodic Table of the Elements

17 Typical Ion Implantation Equipment Source: SJSU

Section C Future Trends

nm wafer processing. Ramp occurring slowly. New materials: - Cu is here. High-end Logic (3.06GHz P4). - low-k dielectrics. Next major material change. - dielectric substrate engineering: SOI, Strained Silicon. - high-k dielectric materials for gates Economics may limit Moore’s Law, not physics ! Future Trends

The information contained herein is based on sources Adams, Harkness & Hill believes to be reliable, but it is neither all-inclusive nor guaranteed to be accurate. Adams, Harkness & Hill has not independently verified the facts, assumptions, and estimates contained herein and, accordingly, makes no representation or warranty, express or implied, concerning the fairness, accuracy, or completeness of the information and opinions contained herein. Opinions and price targets reflect our judgment at a particular time and are subject to change due to economic, industry, and firm-specific factors. This transmission is not intended to be an offer or solicitation to buy or sell securities. Adams, Harkness & Hill and its affiliates, principals or employees may have a position in the securities referred to in this report or own options, rights, or warrants to purchase such securities. The research analyst receives compensation based on, among other factors, the overall profitability of Adams, Harkness & Hill, including income derived from investment banking revenues. Additional information on the securities is available on request. In addition to the relationships disclosed concerning the subject company(ies), Adams, Harkness & Hill may make a market, deal as principal, have managed or co-managed a public offering, acted as initial purchaser or placement agent for a private placement, performed other investment-banking services, or have a principal or employee acting as a director for any company mentioned in this transmission. © Copyright 2002 Adams, Harkness & Hill, Inc. All rights reserved. This publication is not meant for private consumers.

60 State Street Boston, MA Four Embarcadero Center Suite 3300 San Francisco, CA Clifford Street * London W1S 2LQ (44) *Adams, Harkness & Hill, Ltd. Member NYSE/NASD/SIPC