Characteristics of Submicron HBTs in the GHz Band M. Urteaga, S. Krishnan, D. Scott, T. Mathew, Y. Wei, M. Dahlstrom, S. Lee, M. Rodwell. Department of Electrical and Computer Engineering, University of California, Santa Barbara DRC, June 2001, South Bend, IN

Ultra-high f max Transferred-Substrate HBTs Substrate transfer provides access to both sides of device epitaxy Permits simultaneous scaling of emitter and collector widths Maximum frequency of oscillation  Sub-micron scaling of emitter and collector widths has resulted in record values of extrapolated f max Extrapolation begins where measurements end New GHz Vector Network Analyzer (VNA) extends device measurement range Gains, dB Frequency, GHz f max = 1.1 THz ?? f  = 204 GHz Mason's gain, U H 21 MSG Emitter, 0.4 x 6  m 2 Collector, 0.7 x 6  m 2 I c = 6 mA, V ce = 1.2 V 3000 Å collector 400 Å base with 52 meV grading AlInAs / GaInAs / GaInAs HBT

High Frequency Device Characterization Motivation Characterize transistors to highest measurable frequency Develop an accurate measurement methodology Measure Transistor Power Gains Results Measured submicron transistors DC-45 GHz, GHz, GHz bands Observed singularity in Unilateral Power Gain Submicron HBTs have very high power gain, but f max can’t be determined

InGaAs 1E19 Si 1000 Å Grade 1E19 Si 200 Å InAlAs 1E19 Si 700 Å InAlAs 8E17 Si 500 Å Grade 8E17 Si 233 Å Grade 2E18 Be 67 Å InGaAs 4E19 Be 400 Å InGaAs 1E16 Si 400 Å InGaAs 1E18 Si 50 Å InGaAs 1E16 Si 2550 Å InAlAs UID 2500 Å S.I. InP 400 Å base, 4* /cm Å collector InGaAs/InAlAs HBT Material System Layer Structure 2kT base bandgap grading Band diagram at V be = 0.7 V, V ce = 0.9 V

Transferred-Substrate Process Flow Emitter metal Emitter etch Self-aligned base Mesa isolation Polyimide planarization Interconnect metal Silicon nitride insulation Benzocyclobutene, etch vias Electroplate gold Bond to carrier wafer with solder Remove InP substrate Collector metal Collector recess etch

Ultra-high f max Submicron HBTs Electron beam lithography used to define submicron emitters and collectors Minimum feature sizes  0.2  m emitter stripe widths  0.3  m collector stripe widths Improved collector-to-emitter alignment using local alignment marks Aggressive scaling of transistor dimensions predicts progressive improvement of f max As we scale HBT to <0.4  m, f max keeps increasing, measurements become very difficult 0.3  m Emitter before polyimide planarization Submicron Collector Stripes (typical: 0.7 um collector)

Stabilize transistor and simultaneously match input and output of device Approximate value for hybrid-  model To first order, MSG does not depend on f  or R bb Simultaneously match input and output of device K = Rollet stability factor How do we measure f max ? For Hybrid-  model, MSG rolls off at 10 dB/decade, MAG has no fixed slope CANNOT be used to accurately extrapolate f max Maximum Available Gain Transistor must be unconditionally stable or MAG does not exist Maximum Stable Gain

Use lossless reactive feedback to cancel device feedback and stablize the device, then match input/output. Unilateral Power Gain Mason’s Unilateral Power Gain For Hybrid-  model, U rolls off at 20 dB/decade ALL Power Gains must be unity at f max U is not changed by pad reactances

Negative Unilateral Power Gain ??? YES, if denominator is negative This may occur for device with a negative output conductance (G 22 ) or some positive feedback (G 12 ) Select G L such that denominator is zero: Can U be Negative? What Does Negative U Mean? Device with negative U will have infinite Unilateral Power Gain with the addition of a proper source or load impedance AFTER Unilateralization Network would have negative output resistance Can support one-port oscillation Can provide infinite two-port power gain Simple Hybrid-  HBT model will NOT show negative U

Submicron HBTs have very low C cb (< 5 fF) Characterization requires accurate measure of very small S12 Standard 12-term VNA calibrations do not correct S12 background error due to probe-to-probe coupling Solution Embed transistors in sufficient length of transmission line to reduce coupling Place calibration reference planes at transistor terminals Line-Reflect-Line Calibration Standards easily realized on-wafer Does not require accurate characterization of reflect standards Characteristics of Line Standards are well controlled in transferred-substrate microstrip wiring environment Accurate Transistor Measurements Are Not Easy Transistor Embedded in LRL Test Structure 230  m Corrupted GHz measurements due to excessive probe-to-probe coupling

HP8510C VNA used with Oleson Microwave Lab mmwave Extenders Extenders connected to GGB Industries coplanar wafer probes via short length of WR-5 waveguide Internal bias Tee’s in probes for biasing active devices Full-two port T/R measurement capability GHz measurement set-up uses same waveguide-to-probe configuration with internal HP test set GHz On-Wafer Network Analysis UCSB GHz VNA Measurement Set-up

Can we trust the calibration ? S11 of through About –40 dB GHz calibration looks OK GHz calibration looks Great S11 of open About 0.1 dB / 3 o error dB S21 of through line is off by less than 0.05 dB S11 of open S11 of short S11 of through Probe-Probe coupling is better than –45 dB

Emitter: 0.3 x 18  m 2, Collector: 0.7 x 18.6  m 2 I c = 5 mA, V ce = 1.1 V RF Gains 0.3  m Emitter / 0.7  m Collector HBTs: Negative U Gains are high at 200 GHz but f max can’t be determined Negative U

Real (Y 11 ) 0.3  m Emitter / 0.7  m Collector HBTs : Negative Output Conductance Real (Y 21 ) Real (Y 12 )Real (Y 22 ) Negative Y 22 Emitter: 0.3 x 18  m 2, Collector: 0.7 x 18.6  m 2 I c = 5 mA, V ce = 1.1 V

RF Gains 0.4  m Emitter / 1.0  m Collector HBTs Emitter: 0.4 x 6  m 2, Collector: 1.0 x 6.6  m 2 I c = 3 mA, V ce = 1.1 V

Real (Y 11 )Real (Y 21 ) Real (Y 12 )Real (Y 22 ) 0.4  m Emitter / 1.0  m Collector HBTs Negative Y 22 Emitter: 0.4 x 6  m 2 Collector: 1.0 x 6.6  m 2 I c = 3 mA, V ce = 1.1 V

RF Gains Less Scaled Devices show expected Power Gain Rolloff Emitter: 0.5 x 8.0  m 2, Collector: 1.2 x 8.6  m 2 I c = 4 mA, V ce = 1.8 V

Submicron HBTs have Extremely Low Parasitics Extremely High Power Gains High f max HBTs are hard to measure Probe-to-Probe coupling can cause errors in S21 Highly scaled transistors show a negative unilateral power gain coinciding with a negative output conductance Cannot extrapolate f max from measurements of U but… Device has ~ 8 dB MAG at 200 GHz Single-stage amplifiers with 6.3 dB gain at 175 GHz have been fabricated (To be presented 2001 GaAs IC Conference Baltimore, MD) Possible sources of Negative Output Conductance Dynamics of capacitance cancellation Dynamics of base-collector avalanche breakdown Measurement Errors (We hope we’ve convinced you otherwise) Conclusions

This work was supported by the ONR under grant N And the AFOSR under grant F Acknowledgements