ECE 511: Digital System & Microprocessor
Course Outline WeekSubject W1-W2Digital Logic Review W2-W3Microprocessor Architecture & Overview W3-W6Microprocessor Instruction Set & Programming W6-W9Memory Interfacing W10-W14Parallel I/O Interfacing
References J. L. Antonakos, “The Microprocessor: Hardware and Software Principles & Applications,” 5 th Ed., Pearson Prentice-Hall, C. M. Gilmore, “Microprocessors: Principles & Applications,” 2 nd Ed., McGraw-Hill, A. Clements, “Microprocessor System Design,” PWS- Kent, J. Palmer & D. Perlman, “Introduction to Digital Systems,” Schaum’s Outlines Series, McGraw-Hill, 1993.
Course Evaluation Tests x 230% Quizzes x 320% Mini Projects50%
If you have problems, please contact me: Ahmad Ihsan bin Mohd Yassin Rm. T2-A13-1A, Dept. of Comp. Eng. Faculty of Elect. Eng. UiTM, Shah Alam , *Please call before you see me.
Digital Logic Review: Part I ECE 511: Digital System & Microprocessor.
What we will learn in this session: Review of logic gates. Flip-flops. Universal representation of logic gates. Decoders.
Gates
What are gates? Gates are: Simple electronic devices. Constructed using transistors. Used to design digital systems. Three basic gates: AND OR NOT Usually packed into ICs.
Gates as Building Blocks
Basic Gate - AND The AND gate is similar to multiply operation. A AND B C A BC TRUTH TABLE
Basic Gate - OR The OR gate is similar to add operation. OR A B C A BC TRUTH TABLE
Basic Gate - NOT The NOT gate performs the inverse operation. NOT A B TRUTH TABLE A B
Extended Gates Combination of basic gates to perform complex functions: NAND NOR XOR XNOR Flip-Flops
NAND Gate Adds NOT after AND gate. AND outputs are inverted NAND (NOT-AND). A AND B C NOT A NAND B C A BC TRUTH TABLE
NOR Gate Adds NOT after OR gate. OR outputs are inverted NOR (NOT-OR). OR A B C NOT C NOR A B A BC TRUTH TABLE
XOR Gate XOR performs the Exclusive Or operation. When A=B, C=0; when A≠B, C=1. A BC TRUTH TABLE XOR A B C
XNOR Gate Adds NOT after XOR gate. XOR outputs inverted XNOR (NOT XOR). A BC TRUTH TABLE XOR A B C NOTXOR A B C
Flip-Flops
Extended gate. 2 gates, feedback connections. 2 inputs, 4 states. Used as memory: Each FF stores 1 bit. Unchanged at “keep” state. More complex ones may: Use timing from CLK. Perform bit toggle.
RS Flip-Flop 4 states: Three stable. One not stable. 2 inputs, 2 outputs. May contain clock (CLK) signal.
RSFF - NOR Implementation *Assuming initial condition: S = 0, R = 0, Q = 0 Q prev SRQ N/A Doesn’t matter 11N/A Unstable Output unchanged Output set (Q = 1) Output reset (Q = 0) Q’ N/A *As long as S=0 and R=0, Q will always remain at previous state. S R Q’ Q
RS Flip-Flop (NAND Implementation) *Assuming initial condition: S = 0, R = 0, Q = 0 Q prev SRQ N/A Doesn’t matter 11N/A Unstable Output unchanged Output set (Q = 1) Output reset (Q = 0) Q’ N/A *As long as S=0 and R=0, Q will always remain at Q prev. S R Q Q’
Clocked RS S R Q’ Q CLK Q prev SRQ N/A Doesn’t matter 11N/A Unstable Output unchanged Output set (Q = 1) Output reset (Q = 0) Q’ N/A CLK ↑ ↑ ↑ Doesn’t matter Only active when CLK is ↑ Reduced sensitivity to noise.
JK Flip-Flop Same as RS, but forbidden state used to toggle bit. Can also be clocked using CLK. Q prev SRQ N/A Q 11Q Toggle Output unchanged Output set (Q = 1) Output reset (Q = 0) Q’ Q
JK Flip-Flop (Palmer & Perlman, pg. 200) Q prev SRQ N/A Q 11Q Toggle Output unchanged Output set (Q = 1) Output reset (Q = 0) Q’ Q J K Q Q
Clocked JK (Palmer & Perlman, pg. 200) Q prev SRQ N/A Q 11Q Toggle Output unchanged Output set (Q = 1) Output reset (Q = 0) CLK ↑ ↑ ↑ ↑ J K Q Q
D-Flip-Flop Data latch. Modification of RSFF. Stores 1-bit of information. Can be combined to store more. How data stored in memory.
D-Flip-Flop D Q’ Q EN Q prev DQ Doesn’t Matter Output set (Q = 1) Output reset (Q = 0) Q’ 0 1 EN 1 1 Only active when EN is 1
D-Flip-Flop: Timing Diagram D EN Q
Storing 8-bits using DFF DFF Q3Q5Q6Q7Q1Q2Q4Q0 EN D3D5D6D7D1D2D4D0
Asynchronous Latch Allows both synchronous & asynchronous operations: Synchronous: CLK driven (Clocked JK). Asynchronous: similar to RSFF. 5 inputs, 2 outputs: J, K and CLK for synch. operation. PR, CLR for asynch. operation.
Asynchronous Latch (Perlman, pg. 201) CLK J K Q Q CLR PRE CLRQ 11Follows J, K, CLK (Synch. JK) 10Q = 0, resets output. 01Q = 1, sets output. 00Not valid. PRECLRQ 00Follows J, K, CLK (Synch. JK) 01Q = 0, resets output. 10Q = 1, sets output. 11Not valid. CLK J K Q Q CLR PRE
Universal Gates – NAND and NOR
NAND and NOR as Universal Gates In industry, NAND and NOR gates are most common. Reason? Can be used to represent any gate (functionally complete). Easiest & cheapest to produce.
NAND Logic
NOR Logic
NAND Logic
NOR Logic
IC 4011 IC 7402
Decoders
Electronic device that: Reverse of an encoder. “Translates” binary codes back into signal. Converts n inputs into 2 n combinations. Uses: Activate devices for use by µP. Memory, I/O interfacing.
Encoder vs. Decoder 8 3 Encoder I0I0 I7I7 I6I6 I5I5 I4I4 I3I3 I2I2 I1I1 Y2Y2 Y0Y0 Y1Y1
Encoder vs. Decoder 3 8 Decoder I0I0 I7I7 I6I6 I5I5 I4I4 I3I3 I2I2 I1I1 Y2Y2 Y0Y0 Y1Y1 Y2Y2 Y1Y1 Y0Y I4I4 I5I5 I6I6 I7I7 I0I0 I1I1 I2I2 I3I
What Goes on Inside a Decoder? Y0 Y1 Y2 I 0 = Y 0 Y 1 Y 2 I 2 = Y 0 Y 1 Y 2 I 3 = Y 0 Y 1 Y 2 I 4 = Y 0 Y 1 Y 2 I 5 = Y 0 Y 1 Y 2 I 6 = Y 0 Y 1 Y 2 I 7 = Y 0 Y 1 Y 2 I 1 = Y 0 Y 1 Y 2
Decoders in Action Decoder Device Code CodeDevice 000LED 001DC Motor 010Memory #1 110LCD Display 011Memory #2 100Memory #3 101Memory #4 Activate Signal
74LS139 Dual 2-4 Line Decoder Motorola 2-4 decoder. 2 x decoders in one IC. 16 pins total: 2 inputs, 4 outputs (active low). Vcc (±5V) and GND. 2 x Enable pins.
74LS139 Dual 2-4 Line Decoder EaEa A 0a A 1a O 0a O 1a O 2a O 3a EbEb A 0b A 1b O 0b O 1b O 2b O 3b
74LS139 Truth Table EI0I0 I1I1 O3O3 O0O0 O1O1 O2O2 1XX
74LS Line Decoder Motorola 3-8 decoder. 1 x decoder in one IC. 16 pins total: 3 inputs, 8 outputs (active low). Vcc (±5V) and GND. 3 x Enable pins.
74LS Line Decoder E1E1 A0A0 A1A1 O0O0 O1O1 O2O2 O3O3 O4O4 O5O5 O6O6 O7O7 E2E2 E3E3 A2A2
E1E1 I0I0 I1I1 O3O3 O0O0 O1O1 O2O2 1XX1111 XXX1111 XXX E2E2 X 1 X 0 0 E3E3 X X I2I2 X X X 0 0 O7O7 O4O4 O5O5 O6O LS138 Truth Table
Conclusion Gates: most basic elements in circuits. Can be extended to perform advanced functions. Some types are universal. Flip-flops can store data – feedback. Decoders transform code into original signals. Can be used to control access to hardware.
The End Please read: Palmer & Perlman, pg