1 8-Bit Comb Filter Shweta Agarwal, Kevin Federico, Chad Schrader, Jing Liu Advisor: Professor David Parent Date: May 11, 2005

2 Agenda Abstract Introduction Project Summary Project Details Cost Analysis Results & Conclusion Acknowledgements

3 Abstract We designed an 8-bit comb filter that operated at 200 MHz and used 217mW of Power and occupied an area of 253x604  m2 and has the delay of 3ns.

4 Introduction Comb Filter is a filter that passes the entire frequency range except for a set of very narrow Bands, spaced usually at equal distances (on either a linear or logarithmic scale). It is used in audio and video applications such as LCD, and Plasma TVs. The filter brings out fine picture detail and provides pure color. It sharpens edges and improves the acoustics.

5 The feed forward comb filter is normally implemented as shown in the figure below, in which the direct signal ``feeds forward'' around the delay line and sums (scaled) with the delay-line output. Figure: The feed forward comb filter. The ``difference equation'' for the feed forward comb filter is

6 Project Summary This project is a successful implementation of an 8 bit comb filter. This filter is comprised of a series of D Flip Flops, an adder and Mux based Flip Flops and it consumes very less area and power and has a delay of 3ns.

7 Schematic

8 Layout

9 Verification

10 Simulations Filter A0 Bit Schematic

11 Filter A7 Bit Schematic

12 Filter A7 Bit Layout

13 Comb Filter Transfer Function

14 Cost Analysis Estimate of the time spent on each phase of the project –Finalizing specs: 10 days –Verifying logic: 10 days –Verifying timing: 20 days –Layout: 25 days –Post extracted timing: 5 days

15 Results & Conclusion Comb Filter is a very important and widely used device and the sharper the curves of the comb filter output, the better is its functionality. The comb filter implemented above was well within specs, (in fact it is much better than expected since it has a delay of 3ns and we aimed for 5ns) and satisfied all desired conditions. Yet, there is always scope for improvement and small changes in layouts might be able to further reduce the area.

16 Acknowledgements Special Thanks to Professor David Parent for valuable support and guidance. Thanks to Cadence Design Systems for the VLSI lab.