1 OC-3072 Packet Classification Using BDDs and Pipelined SRAMs Author: Amit Prakash, Adnan Aziz Publisher: Hot Interconnects 9, Presenter: Hsin-Mao Chen Date:2010/09/15

2 Outline Introduction Background Classifier Architecture Reducing the Number of Levels Updates Hardware implementation

3 Introduction Multiprotocol Label Switching (MPLS) Label lookup and label switching were faster than a routing table lookup because they could take place directly within the switched fabric.

4 Introduction Multiprotocol Label Switching (MPLS) The major goal of MPLS development - the increase of routing speed - is no longer relevant because of the usage of ASIC, TCAM and CAM-based switching.

5 Background Binary Decision Diagrams

6 Classifier Forwarding Table IPOutput ports 0*0 1*1 01* * F = X 0 X 1 X 2 +X 0 X 1 X 2 +X 0 X 1 X 2 +X 0 X 1 X 2 = X 0 X 1 +X 0 (X 1 X 2 +X 1 X 2 )

7 Classifier

8 Architecture If we allocate 16K BDD nodes for each level, we can accommodate 60K prefixes with room to spare. Hence it suffices for each SRAM to be 32K x 14 bits in size.

9 Reducing the Number of Levels If we are allocating 16K nodes for each level, we do not need the first 14 SRAMs. Almost prefixes are less than or equal to 24 bits. So in most cases we can get the result after the 24-th level.

10 Updates When a prefix is changed, the number of nodes in the original BDD that change is always less than equal to the number of levels.

11 Hardware implementation A forwarding table for MAE-WEST obtained from CAIDA prefixes and 62 output ports

12 Hardware implementation