Assembly Language Basic Concepts IA-32 Processor Architecture

Hardware  Intel386, Intel486, Pentium, or latest processors, AMD processors, or compatible processors. The same architectures, but different organizations.  Not working in MAC computers, SUN Sparc workstations.

Operating Systems  MS-DOS, Windows 95/98/ME/NT/2000/XP.  Advanced programs relating to direct hardware access and disk sector programming must be run under MS-DOS, Windows 95/98/ME.  Not working in Linux, MAC OS.

Programming Software  Editor: Microsoft Visual C++, TextPad, Notepad.  Assembler and linker: MASM  32-but debugger: Microsoft Visual C++.  Other: MASM 32.

Two Types of Programs  16-bit real-address mode: Run under MS-DOS and in the console window under MS-Windows. Written for the Intel 8086 and 8088 processors. Not discussed in this class.  32-bit protected mode: All the programs in this class.

Build Environments  Microsoft Visual C++ installed.  Install MASM 6.15:  Set tools: Build, run, and debug. 6/index.htm 6/index.htm

A Simple C File  #include  void main()  {  int i;  i = 0x10000;  i = i + 0x40000;  i = i - 0x20000;  printf("i= %d\n", i);  }

Into Assembly Language  3: void main()  4: {  0040B450 push ebp  0040B451 mov ebp,esp  0040B453 sub esp,44h  0040B456 push ebx  0040B457 push esi  0040B458 push edi  0040B459 lea edi,[ebp-44h]  0040B45C mov ecx,11h  0040B461 mov eax,0CCCCCCCCh  0040B466 rep stos dword ptr [edi]  5: int i;  6:  7: i = 0x10000;  0040B468 mov dword ptr [ebp-4],10000h

 8: i = i + 0x40000;  0040B46F mov eax,dword ptr [ebp-4]  0040B472 add eax,40000h  0040B477 mov dword ptr [ebp-4],eax  9: i = i - 0x20000;  0040B47A mov ecx,dword ptr [ebp-4]  0040B47D sub ecx,20000h  0040B483 mov dword ptr [ebp-4],ecx  10: printf("i= %d\n", i);  0040B486 mov edx,dword ptr [ebp-4]  0040B489 push edx  0040B48A push offset string "i= %d\n" (0041fe50)  0040B48F call printf (0040b710)  0040B494 add esp,8  11: }

A Simple MASM File  TITLE Add and Subtract (AddSub.asm)  ; This program adds and subtracts 32-bit integers.  ; Last update: 2/1/02  INCLUDE Irvine32.inc .code  main PROC  mov eax,10000h; EAX = 10000h  add eax,40000h; EAX = 50000h  sub eax,20000h; EAX = 30000h  call DumpRegs  exit  main ENDP  END main

Portability  Assembly language is not portable.  Well-known processor families are Motorola 68x00, Intel IA-32, SUN Sparc, DEC Vax, and IBM-370.

Applications  Small embedded programs.  Real-time applications.  Computer game consoles.  Help understand computer hardware and operating systems.  Subroutines hand optimized for speed.  Device drivers.

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Virtual Machines Tanenbaum: Virtual machine concept Programming Language analogy: Each computer has a native machine language (language L0) that runs directly on its hardware A more human-friendly language is usually constructed above machine language, called Language L1 Programs written in L1 can run two different ways: Interpretation – L0 program interprets and executes L1 instructions one by one Translation – L1 program is completely translated into an L0 program, which then runs on the computer hardware

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Translating Languages English: Display the sum of A times B plus C. C++: cout << (A * B + C); Assembly Language: mov eax,A mul B add eax,C call WriteInt Intel Machine Language: A F E

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Specific Machine Levels (descriptions of individual levels follow... )

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Modes of Operation Protected mode native mode (Windows, Linux) Real-address mode native MS-DOS System management mode power management, system security, diagnostics Virtual-8086 mode hybrid of Protected each program has its own 8086 computer

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Basic Execution Environment Addressable memory General-purpose registers Index and base registers Specialized register uses Status flags Floating-point, MMX, XMM registers

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Addressable Memory Protected mode 4 GB 32-bit address Real-address and Virtual-8086 modes 1 MB space 20-bit address

Web siteWeb site ExamplesExamples Microsoft Visual C++

Web siteWeb site ExamplesExamples Flags BookOFDIxSFZFxACxPxCF Visual C OVUPEIxPLZRxACxPExCY

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, General-Purpose Registers Named storage locations inside the CPU, optimized for speed.

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Accessing Parts of Registers Use 8-bit name, 16-bit name, or 32-bit name Applies to EAX, EBX, ECX, and EDX

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Index and Base Registers Some registers have only a 16-bit name for their lower half:

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Some Specialized Register Uses (1 of 2) General-Purpose EAX – accumulator ECX – loop counter ESP – stack pointer ESI, EDI – index registers EBP – extended frame pointer (stack) Segment CS – code segment DS – data segment SS – stack segment ES, FS, GS - additional segments

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Some Specialized Register Uses (2 of 2) EIP – instruction pointer EFLAGS status and control flags each flag is a single binary bit

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Status Flags Carry unsigned arithmetic out of range Overflow signed arithmetic out of range Sign result is negative Zero result is zero Auxiliary Carry carry from bit 3 to bit 4 Parity sum of 1 bits is an even number

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Floating-Point, MMX, XMM Registers Eight 80-bit floating-point data registers ST(0), ST(1),..., ST(7) arranged in a stack used for all floating-point arithmetic Eight 64-bit MMX registers Eight 128-bit XMM registers for single- instruction multiple-data (SIMD) operations

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, IA-32 Memory Management Real-address mode Calculating linear addresses Protected mode Multi-segment model Paging

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Real-Address mode 1 MB RAM maximum addressable Application programs can access any area of memory Single tasking Supported by MS-DOS operating system

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Segmented Memory Segmented memory addressing: absolute (linear) address is a combination of a 16-bit segment value added to a 16-bit offset linear addresses one segment

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Calculating Linear Addresses Given a segment address, multiply it by 16 (add a hexadecimal zero), and add it to the offset Example: convert 08F1:0100 to a linear address Adjusted Segment value: 0 8 F 1 0 Add the offset: Linear address:

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Protected Mode (1 of 2) 4 GB addressable RAM ( to FFFFFFFFh) Each program assigned a memory partition which is protected from other programs Designed for multitasking Supported by Linux & MS-Windows

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Protected mode (2 of 2) Segment descriptor tables Program structure code, data, and stack areas CS, DS, SS segment descriptors global descriptor table (GDT) MASM Programs use the Microsoft flat memory model

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Flat Segment Model Single global descriptor table (GDT). All segments mapped to entire 32-bit address space

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Multi-Segment Model Each program has a local descriptor table (LDT) holds descriptor for each segment used by the program

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Paging Supported directly by the CPU Divides each segment into 4096-byte blocks called pages Sum of all programs can be larger than physical memory Part of running program is in memory, part is on disk Virtual memory manager (VMM) – OS utility that manages the loading and unloading of pages Page fault – issued by CPU when a page must be loaded from disk

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Levels of Input-Output Level 3: Call a library function (C++, Java) easy to do; abstracted from hardware; details hidden slowest performance Level 2: Call an operating system function specific to one OS; device-independent medium performance Level 1: Call a BIOS (basic input-output system) function may produce different results on different systems knowledge of hardware required usually good performance Level 0: Communicate directly with the hardware May not be allowed by some operating systems

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, Displaying a String of Characters When a HLL program displays a string of characters, the following steps take place:

Web siteWeb site ExamplesExamples Irvine, Kip R. Assembly Language for Intel-Based Computers 5/e, ASM Programming levels ASM programs can perform input-output at each of the following levels: Library Level 3