Improving Power And Performance of Embedded Applications Using Residue Number System Compilers For Embedded Systems Rooju Chokshi

Motivation Immense increase in the usage and popularity of battery powered electronic appliances. Cellular phones, MP3 players, portable DVD players, etc. Demand low power operation, to conserve battery. Extremely important for embedded processors to have low power, yet reasonably fast, operation.

Motivation Residue Number System (RNS) has been found to be very efficient in doing certain arithmetic operations. Researchers have constructed ASIC architectures for DSP units, like FIR filters, based on RNS, which are faster and consume less power than 2’s complement binary number system. Can we utilize RNS in a general purpose processor architecture?

Introduction to RNS Non-positional number system Characterized by set of relatively prime numbers (P 1,P 2,….,P k ) A binary number N is represented as a k-tuple (R 1,R 2,….,R k ), where R i =N mod P i Any number in [0,M), M= P 1 xP 2 x….xP k can be uniquely represented. M is called the dynamic range.

Introduction to RNS Arithmetic Operations – X = (x 1,x 2,….,x k ), Y = (y 1,y 2,….,y k ) – X±Y = (x 1 ±y 1,x 2 ±y 2,….,x k ±y k ) – X×Y = (x 1 ×y 1,x 2 ×y 2,….,x k ×y k ) Bigger computation is split into smaller, parallel compuations. Overhead of conversions from binary to RNS and vice-versa.

Introduction to RNS Advantages – Additions, subtractions, multiplications can be done faster Disadvantages – Overhead of conversions. – Residue to Binary, based on Chinese Remainder Theorem, is especially expensive. – Magnitude comparison not possible.

Related Work Jenkins & Leon, 1977 – Used RNS to design FIR filters Jenkins, Soderstrand, Jullien, Taylor, 1986 – Residue Number System Arithmetic: modern applications in Digital Signal Processing. ASIC implementations of DSP algorithms, like FIR filters, etc.

Related Work Large body of work done in designing better (faster and/or low power) arithmetic units (adders, multipliers) and RNS-to-binary converters. Notable: – Piestrak, 1989 – Usage of carry-save adders in designing faster units for RNS. Griffin, Taylor, 1989 – Proposed the concept of RNS RISC as an area of research

Related Work H. T. Vergos, 2001 – Proposed 200 MHz RNS Core – Supposed to be used as a building block in ASIC design. Chaves & Sousa, 2003 – Design RISC DSP based on RNS – Do not talk application level transformations to take advantage of new architecture. Chaves & Sousa, 2007 – Moduli sets for balanced processing.

Focus Areas How can we use RNS to reduce power and/or increase performance of embedded applications? – How can we design faster and low-power arithmetic units for RNS, specifically, the RNS-to- binary converter? – What selection of moduli aids in this? – How can the compiler take advantage of this new microarchitecture?