EECS Department, Northwestern University, Evanston Thermal-Induced Leakage Power Optimization by Redundant Resource Allocation Min Ni and Seda Ogrenci Memik November 6, 2006

Thermal Leakage Coupling Four main sources of leakage current –Reverse-biased junction leakage current (IREV) –Gate induced drain leakage (IGIDL) –Gate direct tunneling leakage (IG) –Subthreshold (weak inversion) leakage (Isub)

Thermal Leakage Coupling Power consumption as a function of temperature [Pedram06]:

Previous Work Low Power Resource Binding  [Chang, DAC95], [Chang, DAC96] Temperature-aware Resource Binding [Mukherjee, DAC05]  Given Resource Constraint  Given Peak Temperature Constraint

Motivation Question: how to decide the peak temperature constraint in high-level synthesis?  One possible metric is minimizing the total leakage power Concept: two-state low power design  Phase one: low leakage power resource allocation  Phase two: low dynamic power resource binding Modeling: relation between number of resources n, temperature T and total leakage power P leakage  Solution: find the number of resources, hence, temperature that minimizes the total leakage power

Outline Leakage estimation model  Curve fitting  Heat transfer for leakage estimation Redundant resource allocation  Resource dynamic power  Estimating the package properties  Steady state temperature Experimental results

Leakage Modeling Analytic Model Curve fitting  Exact Lagrange’s interpolation:

Leakage Modeling Benefit vs. Analytic:  Polynomial is better for analytical and numerical computation  Let HSpice take care of the physical details Benefit vs. non-exact fitting, e.g. least-square  Exact fitting over the range of interest

Heat Transfer Modeling The basic relation between power density, heat transfer coefficient and temperature [Im, IEDM00]  Temperature evaluation based on dynamic power, which assumes to be a constant value

Heat Transfer Modeling Actual power The situation becomes more complicated after adding the leakage power Leakage power scaling based on the area of resource  F = 250 for 16-bit multiplier with area =  F = 80 for 32-bit adder with area =

Optimal Resource Number The relation between the number of resources and total leakage power  If we set, we have, 

What’s Next Given the number of resources n, the subproblem becomes solving the following equation Here, we still have two unknown values  Dynamic power P d  Heat transfer coefficient h Our goal is to decide n, which minimizes the following  P leakage = n*L p (T x )

Resource Dynamic Power Estimation Assumptions and simplifications  Each resource consumes a typical average dynamic power for executing one operation  Ignore the dynamic power of extra dynamic power of MUX when sharing resource Dynamic power of one operation is Bench#stepsP d per AddP d per Multi Arf Ewf Fdct Fft

Estimating the Package Properties Tradeoff between heat transfer coefficient and cost  Thermal runaway  Maximum h (minimum cost) package Find the maximum h  Binary search  Two Initial points

Steady State Temperature Solve the following equation by secant method Secant method, no explicit derivative is needed Initial point

Complete flow of algorithm Incremental search  The solution space is small Near-optimal solution  The leakage benefit becomes small Optimize when more than one resource type is in the DFG  First add redundancy for the module with highest power density  The operations are assumed to be distributed evenly among all available resources

Experiment results Resources used in the experiments Scaling from 180nm down to 70nm by full-scale methodology Benchmarks are popular DSP and multimedia kernels [Mangione-Smith, Micro97], example “arf”, AreaAverage P d Delay Adder Multiplier

Experiment Results Leakage power vs. min-resource allocation(53.8% improvement) and temperature-aware allocation(35.7% improvement) [Mukherjee, DAC05]

Experiment Results Resource temperature of different allocation strategies  Adder and multiplier temperature

Conclusions The contribution of this paper includes:  A paradigm for two-stage low power resource allocation and binding methodology  A simple leakage estimation model in high-level synthesis design phase  A leakage optimizing algorithm trading off resource area with total leakage power Thank you