The Great I2C Mystery. The mystery Occasionally, when accessing the I2C bus, the APVs are found not to respond correctly to I2C commands, actually they.

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Presentation transcript:

The Great I2C Mystery

The mystery Occasionally, when accessing the I2C bus, the APVs are found not to respond correctly to I2C commands, actually they are stuck –This is confirmed by Resetting the APV, after which they respond correctly

The theoretical waveforms SCL SDA D1 D0 Ack Cycle Example for an I2C write cycle Driven by master Driven by slave SDA ↓ must occur after SCL ↓

The actual waveforms SCL SDA D1 D0 Ack Cycle Driven by master Driven by slave SCL ↓ before SDA ↓ by a few ns

… on scope SCL on FE-Hybrid SDA

What we believe the APV believes SCL SDA D1 D0 Ack Cycle Driven by master Driven by slave ARRRGGGHHHH!!!!!

Present Electrical circuit AOH FE-Hybrid SCL SDA 82  Parasitic on FE Hybrid C H Parasitic on AOH C A C H > C A

Proposed Electrical circuit AOH FE-Hybrid SCL SDA 82  > 3 K 

Solution Replace the 82 ohm protection resistor to AOH (ONLY the one to the AOH !) with something like 3.3 K (Precise value to be confirmed after full Temp cycle tests !)

82->500  and +47 pF on AOH SCL on FE-Hybrid SCL on AOH SDA