Status – Week 248 Victor Moya. Summary Streamer. Streamer. TraceDriver. TraceDriver. bGPU bGPU Signal Traffic Analyzer. Signal Traffic Analyzer. How to.

Slides:



Advertisements
Similar presentations
Computer Programming Mr. José A. Ortiz Morris. Computer Language  Languages that the computer understands.  They are low level languages. (BINARY 1.
Advertisements

Hardware-Based Speculation. Exploiting More ILP Branch prediction reduces stalls but may not be sufficient to generate the desired amount of ILP One way.
1/1/ / faculty of Electrical Engineering eindhoven university of technology Speeding it up Part 3: Out-Of-Order and SuperScalar execution dr.ir. A.C. Verschueren.
1 Lecture: Out-of-order Processors Topics: out-of-order implementations with issue queue, register renaming, and reorder buffer, timing, LSQ.
CS6290 Tomasulo’s Algorithm. Implementing Dynamic Scheduling Tomasulo’s Algorithm –Used in IBM 360/91 (in the 60s) –Tracks when operands are available.
Chapter 4 : File Systems What is a file system?
ECE 2162 Tomasulo’s Algorithm. Implementing Dynamic Scheduling Tomasulo’s Algorithm –Used in IBM 360/91 (in the 60s) –Tracks when operands are available.
1 Today’s lecture  Last lecture we started talking about control flow in MIPS (branches)  Finish up control-flow (branches) in MIPS —if/then —loops —case/switch.
Status – Week 257 Victor Moya. Summary GPU interface. GPU interface. GPU state. GPU state. API/Driver State. API/Driver State. Driver/CPU Proxy. Driver/CPU.
File Systems.
Spring 2003CSE P5481 Reorder Buffer Implementation (Pentium Pro) Hardware data structures retirement register file (RRF) (~ IBM 360/91 physical registers)
Chapter 8. Pipelining. Instruction Hazards Overview Whenever the stream of instructions supplied by the instruction fetch unit is interrupted, the pipeline.
LC-3 Computer LC-3 Instructions
Memory Management (II)
Tutorial 6 Working with Web Forms
Status – Week 250 Victor Moya. Summary Current State. Current State. Next Tasks. Next Tasks. Future Work. Future Work. Creditos investigación. Creditos.
Status – Week 274 Victor Moya. Simulator model Boxes. Boxes. Perform the actual work. Perform the actual work. A box can only access its own data, external.
Status – Week 249 Victor Moya. Summary MemoryController. MemoryController. Streamer. Streamer. TraceDriver. TraceDriver. Statistics. Statistics.
Chapter 12 Pipelining Strategies Performance Hazards.
Status – Week 259 Victor Moya. Summary OpenGL Traces. OpenGL Traces. DirectX Traces. DirectX Traces. Proxy CPU. Proxy CPU. Command Processor. Command.
Status – Week 247 Victor Moya. Summary Streamer. Streamer. TraceDriver. TraceDriver. bGPU bGPU Signal Traffic Analyzer. Signal Traffic Analyzer.
Status – Week 243 Victor Moya. Summary Current status. Current status. Tests. Tests. XBox documentation. XBox documentation. Post Vertex Shader geometry.
[M2] Traffic Control Group 2 Chun Han Chen Timothy Kwan Tom Bolds Shang Yi Lin Manager Randal Hong Mon. Nov. 11 Overall Project Objective : Dynamic Control.
Status – Week 231 Victor Moya. Summary Primitive Assembly Primitive Assembly Clipping triangle rejection. Clipping triangle rejection. Rasterization.
Software and Software Vulnerabilities. Synopsis Array overflows Stack overflows String problems Pointer clobbering. Dynamic memory management Integer.
Ceng Operating Systems
GPU Simulator Victor Moya. Summary Rendering pipeline for 3D graphics. Rendering pipeline for 3D graphics. Graphic Processors. Graphic Processors. GPU.
Status – Week 265 Victor Moya. Summary ShaderEmulator ShaderEmulator ShaderFetch ShaderFetch ShaderDecodeExecute ShaderDecodeExecute Communication storage.
Status – Week 272 Victor Moya. Vertex Shader VS 2.0+ (NV30) based Vertex Shader model. VS 2.0+ (NV30) based Vertex Shader model. Multithreaded?? Implemented.
File Systems Implementation. 2 Recap What we have covered: –User-level view of FS –Storing files: contiguous, linked list, memory table, FAT, I-nodes.
Status – Week 254 Victor Moya. Summary Command Processor. Command Processor. Memory Controller. Memory Controller. Streamer. Streamer. Vertex buffers.
Status – Week 240 Victor Moya. Summary Post Geometry Pipeline. Post Geometry Pipeline. Rasterization. Rasterization. Triangle Setup. Triangle Setup. Triangle.
Status – Week 260 Victor Moya. Summary shSim. shSim. GPU design. GPU design. Future Work. Future Work. Rumors and News. Rumors and News. Imagine. Imagine.
Status – Week 245 Victor Moya. Summary Streamer Streamer Creditos investigación. Creditos investigación.
Ext* Content Areas Inodes, Directories & Files. Review Recall …the file system metadata The superblock describes the file system The group descriptor.
Git for Version Control These slides are heavily based on slides created by Ruth Anderson for CSE 390a. Thanks, Ruth! images taken from
1 Project 7: Huffman Code. 2 Extend the most recent version of the Huffman Code program to include decode information in the binary output file and use.
Virtual Memory.
ENGR 3950U / CSCI 3020U: Operating Systems Description and C Code of Major Functions in Simulated Unix File System. Instructor: Dr. Kamran Sartipi Faculty.
Chapter 4. INTERNAL REPRESENTATION OF FILES
CIS250 OPERATING SYSTEMS Memory Management Since we share memory, we need to manage it Memory manager only sees the address A program counter value indicates.
Pointers OVERVIEW.
Project 2: Initial Implementation Notes Tao Yang.
Implementing Precise Interrupts in Pipelined Processors James E. Smith Andrew R.Pleszkun Presented By: Ravikumar Source:
CSC 221: Recursion. Recursion: Definition Function that solves a problem by relying on itself to compute the correct solution for a smaller version of.
Chapter 4. INTERNAL REPRESENTATION OF FILES
1 Programming of FPGA in LiCAS ADC for Continuous Data Readout Week 5 Report Tuesday 29 th July 2008 Jack Hickish.
Week 3 January 22, 2004 Adrienne Noble. Today CVS – a great tool to use with your groups Threads – basic thread operations Intro to synchronization Hand.
Constructive Computer Architecture Tutorial 8 Final Project Part 2: Coherence Sizhuo Zhang TA Nov 25, 2015T08-1http://csg.csail.mit.edu/6.175.
UNIX File System (UFS) Chapter Five.
I MPLEMENTING FILES. Contiguous Allocation:  The simplest allocation scheme is to store each file as a contiguous run of disk blocks (a 50-KB file would.
L.T.E :: Learning Through Experimenting Using google-svn for MtM Docs Development Denis Thibault Version 3.2 Mar 12 th, 2009.
File Systems cs550 Operating Systems David Monismith.
14.1 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition Chapter 10 & 11: File-System Interface and Implementation.
Implementing Precise Interrupts in Pipelined Processors James E. Smith Andrew R.Pleszkun Presented By: Shrikant G.
Queue Manager and Scheduler on Intel IXP John DeHart Amy Freestone Fred Kuhns Sailesh Kumar.
1 Structure of Processes Chapter 6 Process State and Transition Data Structure for Process Layout of System Memory THE DESIGN OF THE UNIX OPERATING SYSTEM.
ICOM 6005 – Database Management Systems Design Dr. Manuel Rodríguez-Martínez Electrical and Computer Engineering Department Lecture 7 – Buffer Management.
Direct memory access. IO Command includes: buffer address buffer length read or write dada position in disk When IO complete, DMA sends an interrupt request.
1 CSC160 Chapter 1: Introduction to JavaScript Chapter 2: Placing JavaScript in an HTML File.
COMP 175 | COMPUTER GRAPHICS Remco Chang1/XX13 – GLSL Lecture 13: OpenGL Shading Language (GLSL) COMP 175: Computer Graphics April 12, 2016.
- Introduction - Graphics Pipeline
Chapter 2: System Structures
In-situ Visualization using VisIt
Operation System Program 4
Out of Order Processors
Lecture: Out-of-order Processors
Chapter 10: File-System Interface
Lecture 3: Main Memory.
Presentation transcript:

Status – Week 248 Victor Moya

Summary Streamer. Streamer. TraceDriver. TraceDriver. bGPU bGPU Signal Traffic Analyzer. Signal Traffic Analyzer. How to commit code. How to commit code.

Streamer Added index mode. Added index mode. Supports out of order memory response. Supports out of order memory response. Supports out of order streaming to the shaders. Supports out of order streaming to the shaders. Supports out of order shader output. Supports out of order shader output. Vertexs are sent in order to the Rasterizer. Vertexs are sent in order to the Rasterizer. Implemented a kind of ‘index/vertex reorder queue’. Implemented a kind of ‘index/vertex reorder queue’. Stream mode and index mode use the same streaming code. Stream mode and index mode use the same streaming code.

Streamer Index Data Buffer Index Cache Output Cache Input Cache to Shaderfrom Shader to Rasterizer from Memory Controller commit (vertex index) (vertex attributes)

Streamer Index Data Buffer Vertex Fifo Vertex Cache VRQ from Memory Controller next Shader”i” head tail alloc fifo

Streamer (index mode) 1) Load index data into the index buffer (divided in two half buffers for ‘pipelining’). 1) Load index data into the index buffer (divided in two half buffers for ‘pipelining’). 2) If the index cache has a free entry and there are free input and output cache entries (starvation?) => 2) If the index cache has a free entry and there are free input and output cache entries (starvation?) => 2.1) read new index from index data buffer. 2.1) read new index from index data buffer. 2.2) search index in the output cache => 2.2) search index in the output cache => 2.2.1) uf found and output cache entry free => mark index/vertex as shaded, reserve the output cache entry for the index/vertex (references = 1) ) uf found and output cache entry free => mark index/vertex as shaded, reserve the output cache entry for the index/vertex (references = 1) ) uf found output cache entry and references > 0 => mark index as shaded, increment reference counter ) uf found output cache entry and references > 0 => mark index as shaded, increment reference counter ) if found output cache entry and references == 0 => mark index as not shaded, increment reference counter ) if found output cache entry and references == 0 => mark index as not shaded, increment reference counter ) if not found => reserve new input and output cache entries for the index/vertex, mark as not loaded and not shaded ) if not found => reserve new input and output cache entries for the index/vertex, mark as not loaded and not shaded.

Streamer (index mode) 3) If the memory controller is ready and there are index/vertex not loaded => ask for the next attribute of the current load vertex. 3) If the memory controller is ready and there are index/vertex not loaded => ask for the next attribute of the current load vertex. 4) If there are loaded indexes (vertex) and the shaders can receive new vertexes => send vertex to the vertex shader. Issue can be out of order. 4) If there are loaded indexes (vertex) and the shaders can receive new vertexes => send vertex to the vertex shader. Issue can be out of order.

Streamer (index mode) 5) If there are new vertex outputs from the shaders => broadcast to the index cache the vertex id, mark indexes as shaded, store vertex output in the reserved entry of the ouput cache. Can be received out of order. 5) If there are new vertex outputs from the shaders => broadcast to the index cache the vertex id, mark indexes as shaded, store vertex output in the reserved entry of the ouput cache. Can be received out of order. 6) If the current index/vertex to commit in the index cache has been already shaded adn the rasterizer is ready => send to the rasterizer, decrement output cache entry reference counter, if references are 0 free output cache entry, free index cache entry. 6) If the current index/vertex to commit in the index cache has been already shaded adn the rasterizer is ready => send to the rasterizer, decrement output cache entry reference counter, if references are 0 free output cache entry, free index cache entry.

Streamer (stream mode) Use vertex counter (start + current vertex) as index. Use vertex counter (start + current vertex) as index. Uses the same algorithm that index mode. Uses the same algorithm that index mode.

TraceDriver Early implementation. Early implementation. Added to the cvs tree. Added to the cvs tree. To do: To do: correct some errors. correct some errors. add vertex program binary code. add vertex program binary code. integrate with the simulator. integrate with the simulator. Future work: Future work: add support for vertex arrays, index arrays, vertexs programs. add support for vertex arrays, index arrays, vertexs programs. support ‘real’ OpenGL traces. support ‘real’ OpenGL traces.

bGPU Now I can start testing it... Now I can start testing it...

Signal Traffic Analyzer Changes to the simulator infraestructure already discussed (mail): Changes to the simulator infraestructure already discussed (mail): Agreggate dynamic object and traffic control functionalities in a single class. Agreggate dynamic object and traffic control functionalities in a single class. All data going through the signal class would use objects derived from that class. All data going through the signal class would use objects derived from that class. SignalBinder has the capability to dump the traffic for a given cycle. SignalBinder has the capability to dump the traffic for a given cycle.

Signal Traffic Analyzer Visualization program? Visualization program? Perl? C? Perl? C?

How to commit code New files and modified files are not sent zipped using mail to other programmers. New files and modified files are not sent zipped using mail to other programmers. New files and modified files are commited using CVS. New files and modified files are commited using CVS. New files and modified files must keep the code style rules: New files and modified files must keep the code style rules: Indentation is 4 spaces, not 3 spaces, not a tab. Indentation is 4 spaces, not 3 spaces, not a tab. Newlines use the UNIX format not the Windows lf/cr format. Newlines use the UNIX format not the Windows lf/cr format. DO NOT COMMIT CODE WITHOUT FOLLOWING THIS RULES. DO NOT COMMIT CODE WITHOUT FOLLOWING THIS RULES.

How to commit code How to commit code with CVS? How to commit code with CVS? Put the modified/new files in your cvs image directory. Put the modified/new files in your cvs image directory. New files and directories are added using ‘cvs add filename’. New files and directories are added using ‘cvs add filename’. BEFORE COMMITING ALWAYS DO AN UPDATE: ‘cvs update’ in the cvs source root directoy. BEFORE COMMITING ALWAYS DO AN UPDATE: ‘cvs update’ in the cvs source root directoy. How to resolve update conflicts? How to resolve update conflicts? COMMIT: ‘cvs commit’. COMMIT: ‘cvs commit’. Put some comments with what has changed in the code would be nice. Put some comments with what has changed in the code would be nice. Send those comments in a commit notice to the other programmers is also nice. Send those comments in a commit notice to the other programmers is also nice.

How to commit code How to resolve update conflicts? How to resolve update conflicts? 1) cvs marks in the source the conflict regions and puts the two code versions. 1) cvs marks in the source the conflict regions and puts the two code versions. 2) it shouldn’t compile correctly. 2) it shouldn’t compile correctly. 3) if it is code you have modified and the conflict is with the old version -> use your code. 3) if it is code you have modified and the conflict is with the old version -> use your code. 4) if it is code someone else has modified and committed but you have not touched -> use the original code. 4) if it is code someone else has modified and committed but you have not touched -> use the original code.

How to commit code 5) if it is code someone else has modified and committed and you have also modified -> 5) if it is code someone else has modified and committed and you have also modified -> a) you know what to do -> do you really know? -> really-> really really really? -> do it. a) you know what to do -> do you really know? -> really-> really really really? -> do it. b) you don’t know -> ask. b) you don’t know -> ask. 6) you don’t know what to do -> ask. 6) you don’t know what to do -> ask.