Chapter 4 Computer Organization Vishal Shah Vishal Pinto

Contents The Von Neumann Architecture The Central Processing Unit The Primary Memory I/O devices Interrupts Conventional Contemporary Computers Mobile Computers Multiprocessors and Parallel Computers

Interrupts Why Device Drivers? read ( devID, myData, dataLength ); x = f ( myData, dataLength, …)

… // Start the device … while ((busy = = 1) || ( done = = 1)) wait( ); //Device I/O complete … done = 0; busy done … while (( busy = = 0) && (done = = 1)) wait( ); // Do the I/O operation busy = 1; … Software Hardware

I/O Polling A process in which a number of I/O devices are interrogated, one at a time, to determine if service is required. Introduces Busy-wait situation.

... Device... CPU InterruptRequest flag Detecting an Interrupt

Fetch-Execute cycle with an Interrupt while (haltFlag not set during execution) { IR = memory[PC]; PC = PC + 1; execute (IR); if ( InterruptRequest) { memory[0] = PC; PC = memory [1]; } Conceptually,hardware connects all device-done flags to the interrupt request flag using inclusive-OR logic

The Interrupt handler Interrupt_Handler { SaveProcessorState( ); for ( i = 0; i<Number_of_devices; i++) if (device[i].done = = 1) goto device_handle(i); /* Something wrong if we get here }

Extension to detect interrupt more rapidly? Interrupt vector. Race condition ? Interrupt occurs while the Interrupt handler is in the midst of execution. Solution: Avoid it.

Disabling Interrupts If ( InterruptRequest && InterruptEnabled ) { /* Interrupt current process */ disableInterrupts ( ); memory [0] = PC; PC = memory[1]; }

Trap Instruction Used by a process running in user mode that wants to perform an operation that requires privileged instructions trap S Mode UserSupervisor Trusted Code

Von Neumann Architecture Primary Memory Unit Device Controller Device CUALU Address Bus Data Bus CPU

Bootstrapping the Machine CMOS POST BIOS Boot Prog Loader OS Power UP ROM RAM Boot Device

Boot Loader Program Fixed_LOC:// Bootstrap loader entry point load R1, =0 load R2, =LENGTH_OF_TARGET /*The next instruction is really more like a procedure call than a machine instruction. It copies a block from BOOT_DISK to BUFFER_ADDRESS.*/ read BOOT_DISK, BUFFER_ADDRESS Loop:load R3, [BUFFER_ADDRESS, R1] store R3,[FIXED_DEST, R1] incr R1 bleq R1, R2, loop br FIXED_DEST

Mobile Computers Features: Physically light and small Severely constrained in the rate at which it can consume power O/P devices are small and usually is speaker Does not contain a storage device Has removable devices like CF cards, NIC..

System-on-chip Technology Set of memory and device functions that is needed by the onboard processor on a single chip.

Power Management Notebook computers –Switch OFF LCD display –Power down Disks Mobile computers –Switch OFF or dim displays –Reducing the clock speed of processor

Multiprocessors and Parallel Computers Parallel instruction Execution Pipelined function unit Function Unit Operand 1 Operand 2 Result Operand 1 Operand 2 Result

Array processors ALU Control Unit Conventional ArchitectureSIMD Architecture

Shared Memory Multiprocessors Processors are Interconnected with one another with primary memory using specialized hardware Popular among programmers tools used to develop s/w for single process could easily be used with the shared memory architecture Distinct from Von Neumann architecture but rely upon it.

Distributed memory Multiprocessors Collection of CPU’s with their memory interconnected using high-speed n/w –High speed LAN or High speed fiber optic n/w Do not support ordinary sequential Programming languages like Shared memory machines do Exchanges data as messages

Network of workstations PC’s interconnected with a network Usually individual computers with autonomous executing units with their own OS