What You Have Always Wanted to Know about FP Hardware Implementation (But Were Afraid to Ask) Acknowledgements: Based on Prof. Shaaban lecture notes, Prof. M. Flynn and S. Oberman’s lecture notes, and past work on the SNAP project Nhon Quach

3/23/2003EE270 Special Lecture on FP Arithmetic2 Outline IEEE 754 Standard – Motivations and implementation challenges Common implementation practices in current FP adders and multipliers Advanced implementation topics (based on the Stanford SNAP project)

3/23/2003EE270 Special Lecture on FP Arithmetic3 IEEE Standard Motivations Enhance portability of math libraries Preserve simple mathematical properties such as a*b = b*a Graceful degradation through support of denormalized numbers Multiple rounding modes for better rounding bias (RN) and interval arithmetic (RP and RM) Well worth the complexity and cost in hardware

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3/23/2003EE270 Special Lecture on FP Arithmetic10 FP Addition Algorithm (the 1 st time)

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3/23/2003EE270 Special Lecture on FP Arithmetic19 Why Need Direct Hardware Support?

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3/23/2003EE270 Special Lecture on FP Arithmetic21 Latency and Throughput of Various FP Units

3/23/2003EE270 Special Lecture on FP Arithmetic22 FP Addition Algorithm (The 2 nd Time)

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3/23/2003EE270 Special Lecture on FP Arithmetic24 Predict the number of 0’s in the result based on the significands Result needs 2’s complemented before normalization

3/23/2003EE270 Special Lecture on FP Arithmetic25 Leading One Prediction (LOP) Detect the patterns of Z*, T*GZ, G*, and T*ZG*, where Z=a’b’, T=a xor b, G=ab, and Z* means any number of Z’s.

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3/23/2003EE270 Special Lecture on FP Arithmetic27 Note the use of “.” notation Multiplicand Multiplier Partial Product Carry and Sum (CPA) Round Final Significand

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3/23/2003EE270 Special Lecture on FP Arithmetic31 Sign Extension Trick (Favorite Interview Question) ssssssss ssssss ssss ss s Adding the 1’s does not change the value of significand Sum of sign and 1 is negative of sign

3/23/2003EE270 Special Lecture on FP Arithmetic32 Many Ways to Build A Tree

3/23/2003EE270 Special Lecture on FP Arithmetic33 Many Types of Counters Too 3-2 counters 7-3 counters 9-2 counters Binary tree, ZM trees, overturned Staircase trees, etc.

3/23/2003EE270 Special Lecture on FP Arithmetic34 FP Addition Algorithm (The 3 rd Time)

3/23/2003EE270 Special Lecture on FP Arithmetic35 Advanced FP Addition Algorithm N. Quach & M. Flynn, SNAP Addition Algorithm, Stanford, 1991

3/23/2003EE270 Special Lecture on FP Arithmetic36 Summary Fast FP adder tricks: two path implementation, LOP, and integrated rounding Fast FP multiplier tricks: sign extension (elimination) logic, partial reduction tree, rounding, and Booth’s encoding

3/23/2003EE270 Special Lecture on FP Arithmetic37 To Probe Further Arith.stanford.edu (lots of technical reports and papers on FP adder, multiplier, and divider implementation) IEEE 754 standard specification David Goldberg, “What Every Computer Scientist Should Know About Floating-Point Arithmetic,” ACM Computing Surveys, 23(1), 5-48 W. Kahan, “IEEE Standard 754 for Binary Floating-Point Arithmetic,” Lecture notes on the status of IEEE 754 standard