Embedded Systems Software Architectures C.-Z. Yang Sept.-Dec. 2001.

Slides:



Advertisements
Similar presentations
Computer Architecture
Advertisements

Categories of I/O Devices
Computer Architecture
WHAT IS AN OPERATING SYSTEM? An interface between users and hardware - an environment "architecture ” Allows convenient usage; hides the tedious stuff.
Processor System Architecture
Computer System Overview
Engineering Open House Need students to demo their players on –Friday 3-4 –Saturday 10-2.
A. Frank - P. Weisberg Operating Systems Process Scheduling and Switching.
Chapter 3: CPU Scheduling
Embedded Systems Introduction to Real-Time Operating Systems C.-Z. Yang Sept.-Dec
Embedded Systems More Operating System Services C.-Z. Yang Sept.-Dec
OPERATING SYSTEM OVERVIEW
Basic Input/Output Operations
5: CPU-Scheduling1 Jerry Breecher OPERATING SYSTEMS SCHEDULING.
Embedded Systems An Overview to Embedded Software C.-Z. Yang Sept.-Dec
Embedded Systems Basic Design Using a Real- Time Operating System C.-Z. Yang Sept.-Dec
Embedded Systems Interrupts C.-Z. Yang Sept.-Dec
IN2305-II Embedded Programming Lecture 5: Survey of SW Architectures.
Cmpt-225 Simulation. Application: Simulation Simulation  A technique for modeling the behavior of both natural and human-made systems  Goal Generate.
INTERRUPTS PROGRAMMING
1 Computer System Overview Chapter 1 Review of basic hardware concepts.
COMP201 Computer Systems Exceptions and Interrupts.
Chapter 6: CPU Scheduling
Copyright © 2006 by The McGraw-Hill Companies, Inc. All rights reserved. McGraw-Hill Technology Education Lecture 5 Operating Systems.
OPERATING SYSTEMS CPU SCHEDULING.  Introduction to CPU scheduling Introduction to CPU scheduling  Dispatcher Dispatcher  Terms used in CPU scheduling.
EMBEDDED SYSTEMS 9 April 2013 William W. McMillan.
Operating system Structure and Operation by Dr. Amin Danial Asham.
CoE3DJ4 Digital Systems Design Chapter 6: Interrupts.
© Janice Regan, CMPT 300, May CMPT 300 Introduction to Operating Systems Principles of I/0 hardware.
2007 Oct 18SYSC2001* - Dept. Systems and Computer Engineering, Carleton University Fall SYSC2001-Ch7.ppt 1 Chapter 7 Input/Output 7.1 External Devices.
Scheduling policies for real- time embedded systems.
The Functions of Operating Systems Interrupts. Learning Objectives Explain how interrupts are used to obtain processor time. Explain how processing of.
1 RTOS Design Some of the content of this set of slides is taken from the documentation existing on the FreeRTOS website
Reference: Ian Sommerville, Chap 15  Systems which monitor and control their environment.  Sometimes associated with hardware devices ◦ Sensors: Collect.
Microprocessors 1 MCS-51 Interrupts.
Cis303a_chapt04.ppt Chapter 4 Processor Technology and Architecture Internal Components CPU Operation (internal components) Control Unit Move data and.
13-Nov-15 (1) CSC Computer Organization Lecture 7: Input/Output Organization.
1: Operating Systems Overview 1 Jerry Breecher Fall, 2004 CLARK UNIVERSITY CS215 OPERATING SYSTEMS OVERVIEW.
CE Operating Systems Lecture 2 Low level hardware support for operating systems.
Operating Systems 1 K. Salah Module 1.2: Fundamental Concepts Interrupts System Calls.
Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition, Chapter 3: Process-Concept.
CE Operating Systems Lecture 2 Low level hardware support for operating systems.
CSCI1600: Embedded and Real Time Software Lecture 9: Input Output Concepts Steven Reiss, Fall 2015.
Embedded Systems Design 1 Lecture Set 8 MCS-51 Interrupts.
6.0 INTRODUCTION TO REAL-TIME OPERATING SYSTEMS (RTOS) 6.0 Introduction A more complex software architecture is needed to handle multiple tasks, coordination,
For a good summary, visit:
Silberschatz, Galvin and Gagne ©2011 Operating System Concepts Essentials – 8 th Edition Chapter 2: The Linux System Part 3.
بسم الله الرحمن الرحيم MEMORY AND I/O.
Embedded Computer - Definition When a microcomputer is part of a larger product, it is said to be an embedded computer. The embedded computer retrieves.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
1 8. Basic Design Using a Real-Time Operating System Kim jung kil.
Embedded Real-Time Systems Processing interrupts Lecturer Department University.
Lecturer 5: Process Scheduling Process Scheduling  Criteria & Objectives Types of Scheduling  Long term  Medium term  Short term CPU Scheduling Algorithms.
Sharing the Processor: A Survey of Approaches to Supporting Concurrency 16-1.
Input / Output Chapter 9.
CS501 Advanced Computer Architecture
Lesson Objectives Aims Key Words Interrupt, Buffer, Priority, Stack
Advanced OS Concepts (For OCR)
Computer Architecture
Operating Systems CPU Scheduling.
An Embedded Software Primer
Processor Fundamentals
CSCI1600: Embedded and Real Time Software
CPU SCHEDULING.
Ainsley Smith Tel: Ex
Interrupt handling Explain how interrupts are used to obtain processor time and how processing of interrupted jobs may later be resumed, (typical.
Embedded System Development Lecture 7 2/21/2007
Chapter 8 I/O.
Embedded System Development Lecture 12 4/4/2007
Chapter 13: I/O Systems “The two main jobs of a computer are I/O and [CPU] processing. In many cases, the main job is I/O, and the [CPU] processing is.
Presentation transcript:

Embedded Systems Software Architectures C.-Z. Yang Sept.-Dec. 2001

元智大學資訊工程系 Systems - Software Architectures2 Software Architectures When you are designing the embedded software, which architecture will be the most appropriate for the given system?

元智大學資訊工程系 Systems - Software Architectures3 Decision Factors The most important factor –how much control you need to have over system response. Good response –Absolute response time requirements –The speed of your microprocessor –and the other processing requirements

元智大學資訊工程系 Systems - Software Architectures4 Some Examples The control of an air conditioner –This system can be written with a very simple software architecture. –The response time can be within a number of tens of seconds. –The major function is to monitor the temperature readings and turn on and off the air conditioner. –A timer may be needed to provide the turn-on and turn-off time.

元智大學資訊工程系 Systems - Software Architectures5 Some Examples The software design of the control of an air conditioner –A simple assembly program for a low-end microprocessor –Inputs Input buttons Temperature readings Timer readings –Output The on-off control of the air conditioner The power control

元智大學資訊工程系 Systems - Software Architectures6 Some Examples Digital telephone answering machine –A telephone answering machine with digital memory, using speech compression. –The performance and functions It should be able to record about 30 minutes of total voice. Voice data are sampled at the standard telephone rate of 8kHz. OGM of up to 10 seconds Three basic modes –default/play back/OGM editing mode

元智大學資訊工程系 Systems - Software Architectures7 Some Examples The class diagram for the answering machine Microphone Line-in Line-out Buttons Speaker Record Lights Controls PlaybackIncoming Message Outgoing Message

元智大學資訊工程系 Systems - Software Architectures8 Some Examples The state diagram for the controls activate behavior

元智大學資訊工程系 Systems - Software Architectures9 Some Examples The software design for the answering machine –It must respond rapidly to many different events. –It has various processing requirements. –It has different deadlines and different priorities. A more complex architecture

元智大學資訊工程系 Systems - Software Architectures10 In This Unit... Four basic software architectures will be discussed: –Round-robin –Round-robin with interrupts –Function-queue-scheduling –Real-time operating system

元智大學資訊工程系 Systems - Software Architectures11 Round-Robin

元智大學資訊工程系 Systems - Software Architectures12 Round-Robin Architecture The simplest architecture Device A Device B Device Z

元智大學資訊工程系 Systems - Software Architectures13 The Simplest Architecture No interrupts No shared data No latency concerns

元智大學資訊工程系 Systems - Software Architectures14 An Application Digital multimeter –R, I, and V readings –Two probes –A rotary switch

元智大學資訊工程系 Systems - Software Architectures15 Digital Multimeter The possible pseudo-code

元智大學資訊工程系 Systems - Software Architectures16 Discussion Timing requirement –Only three I/O devices –No particularly lengthy processing –No tight response requirements Emergency control –No such requirements –Users are unlikely to notice the few fractions of a second it takes for the microprocessor to get around the loop

元智大學資訊工程系 Systems - Software Architectures17 Discussion Advantages –Simplicity –Low development cost –Short development cycle Shortcomings –This architecture cannot handle complex problems.

元智大學資訊工程系 Systems - Software Architectures18 Shortcomings If any one device needs response in less time –Two possible improvements for the RR architecture Squeezing the loop Carefully arranging the sequence (A,Z,B,Z,C,Z,D,Z,…) If there is any lengthy processing to do –Every other event is also postponed. This architecture is fragile –A single additional device or requirement may break everything.

元智大學資訊工程系 Systems - Software Architectures19 Round-Robin with Interrupts

元智大學資訊工程系 Systems - Software Architectures20 Round-Robin with Interrupts A little bit more control –In this architecture, ISR deal with the very urgent needs of the hardware and the set flags. the main loop polls the flags and does any follow-up processing. The ISR can get good response. All of the processing that you put into the ISR has a higher priority than the task code.

元智大學資訊工程系 Systems - Software Architectures21 A Little Bit More Control You can control the priorities among the ISR as well. The software is more event-driven. Task Code ISR Shared Variables

元智大學資訊工程系 Systems - Software Architectures22 The Architecture Two main parts Interrupt Service RoutinesThe main loop

元智大學資訊工程系 Systems - Software Architectures23 RR vs. RR-INT Priority levels

元智大學資訊工程系 Systems - Software Architectures24 Discussion Advantage –The processing is more effectively. Disadvantage –All of the shared-data problems can potentially jump and bite you.

元智大學資訊工程系 Systems - Software Architectures25 An Example of A Simple Bridge A device with two ports on it that forwards data traffic received on the first port to the second and vice versa.

元智大學資訊工程系 Systems - Software Architectures26 Some Assumptions Whenever a character is received on one of the communication links, it causes an interrupt. The Interrupt must be serviced reasonably quickly. Interrupt

元智大學資訊工程系 Systems - Software Architectures27 Some Assumptions The microprocessor must write characters to the I/O hardware one at a time. The I/O transmitter hardware on that communication ink will be busy while it sends the character. Then it will interrupt to indicate that it is ready for the next character.

元智大學資訊工程系 Systems - Software Architectures28 Some Assumptions We have routines that will –read characters from and write characters to queues and –test whether a queue is empty or not. These routines can be called from ISRs as well as from the task code. They deal correctly with the shared-data problems.

元智大學資訊工程系 Systems - Software Architectures29 Possible Code Data structures

元智大學資訊工程系 Systems - Software Architectures30 Possible Code Interrupt service routines Interrupts upon receiving characters Interrupts upon sending characters

元智大學資訊工程系 Systems - Software Architectures31 Possible Code The main loop

元智大學資訊工程系 Systems - Software Architectures32 Possible Code encrypt() and decrypt()

元智大學資訊工程系 Systems - Software Architectures33 Another Example: Cordless Bar-code Scanner The cordless bar-code scanner

元智大學資訊工程系 Systems - Software Architectures34 Characteristics of RR-INT The primary shortcoming –All of the task code executes at the same priority

元智大學資訊工程系 Systems - Software Architectures35 Characteristics of RR-INT A possible solution –Putting code into the interrupt service routines –However, this may lengthen the response times for the ISRs for low-priority devices. Alternative solution –Changing the testing sequence A,C,B,C,D,C,E,C,… –However, the code is more fragile.

元智大學資訊工程系 Systems - Software Architectures36 Inappropriate Cases for RR-INT A laser printer –Calculating the locations where the black dots go is very time-consuming. –In RR-INT architecture, the only code that will get good response is code in ISR. –Any task code may potentially be stuck while the system calculates more locations for black dots. The underground tank-monitoring system –The code that calculates how much gasoline is in the tanks is very time-consuming.

元智大學資訊工程系 Systems - Software Architectures37 Function-Queue-Scheduling Architecture

元智大學資訊工程系 Systems - Software Architectures38 FQS Architecture In this architecture, the interrupt service routines add function pointers to a queue of function pointers. *foo() foo() { } foo() { }

元智大學資訊工程系 Systems - Software Architectures39 The Framework of FQS Three parts

元智大學資訊工程系 Systems - Software Architectures40 The FQS Architecture The advantages –No rule says main has to call the functions in the order that the interrupt routines occurred. –Any task code functions that need quicker response can be executed earlier. –All this rakes is a little clever coding in the routines that queue up the function pointers. The worst wait –the length of the longest of the task code function

元智大學資訊工程系 Systems - Software Architectures41 The FQS Architecture The trade-off –The response for the lower-priority task code functions may get worse. –Lower-priority functions may never execute if the interrupt service schedule the higher-priority functions frequently enough to use up all of the microprocessor’s available time.

元智大學資訊工程系 Systems - Software Architectures42 Real-Time Operating System Architecture

元智大學資訊工程系 Systems - Software Architectures43 RTOS Architecture The most sophisticated architecture In this architecture, the ISRs take care of the most urgent operations. Then they “signal” that there is work for the task code to do.

元智大學資訊工程系 Systems - Software Architectures44 A Paradigm The sample code

元智大學資訊工程系 Systems - Software Architectures45 The Processing The necessary signaling between the interrupt routines and the task code is handled by RTOS. –No shared variable needs to be used. No loop in our code decides what needs to be done next. –RTOS knows about the various task-code subroutines and will run whichever of them is more urgent. RTOS can suspend a task-code subroutine in the middle of its processing in order to run another.

元智大學資訊工程系 Systems - Software Architectures46 A Priority-based Scheduling RTOS can control task code response as well as ISR response. The worst-case wait for the highest-priority task code is zero. Therefore, your system’s response will be relatively stable. Another advantage is that RTOSs are widely available for purchase.

元智大學資訊工程系 Systems - Software Architectures47 Priority Levels A comparison

元智大學資訊工程系 Systems - Software Architectures48 Disadvantages The RTOS itself uses a certain amount of processing time. –You are getting better response at the expense of a little bit of throughput. Also, the software architecture is much more complex.

元智大學資訊工程系 Systems - Software Architectures49 Selecting an Architecture

元智大學資訊工程系 Systems - Software Architectures50 Some Suggestions Select the simplest architecture that will meet your response requirements. –Writing embedded-system software is complicated enough without choosing an unnecessarily complex architecture for your software. if your system has response requirements that might necessitate using a RTOS, you should lean toward using a RTOS.

元智大學資訊工程系 Systems - Software Architectures51 Some Suggestions If it makes sense for your system, you can create hybrids of the architectures. –Even if you are using a RTOS, you can have a low-priority task that polls those parts of the hardware that do not need fast response. Hybrid architectures make sense for some systems.

元智大學資訊工程系 Systems - Software Architectures52 The Summary

元智大學資訊工程系 Systems - Software Architectures53 A Characteristic Table Four architectures