Computer Architecture Laboratory - CAL - 1 CAL SARA - Scaleable Architecture for Realtime Applications -

Computer Architecture Laboratory - CAL - 2 CAL SARA next generation -Scaleable Architecture for Real-time Applications- The research question is: will it be possible to meet the following objectives if software functions and new functions implements in hardware? –Scaleable and Simpler –Flexible –Observable and Controllable –Efficiency and higher Performance –Better Low-Cost/Real-time Performance Value, –Fault Tolerance,

Computer Architecture Laboratory - CAL - 3 CAL We work only with MIMD architecture We work also with Power PC, VME, PCI bus....

Computer Architecture Laboratory - CAL - 4 CAL MIMD löst kopplade

Computer Architecture Laboratory - CAL - 5 CAL MIMD hårt kopplade

Computer Architecture Laboratory - CAL - 6 CAL MIMD hårt kopplade med Cache

Computer Architecture Laboratory - CAL - 7 CAL MIMD hårt och löst kopplade (hybrid)

Computer Architecture Laboratory - CAL - 8 CAL MIMD hårt och löst kopplade (hybrid) med I/O

Computer Architecture Laboratory - CAL - 9 CAL Scalability and Simple CPU1 GRAM RTUA RAM CPU2 RAM CPU0 RAM CPUA RAM CPU1 RTUB RAM CPU2 RAM CPU0 RAM Next sub system More performance - no change in software - more processors

Computer Architecture Laboratory - CAL - 10 CAL Flexibility Different software architectures could use the same hardware architecture. New version - no change in hardware - flexible hardware

Computer Architecture Laboratory - CAL - 11 CAL Problem: Verifikation! Hur får vi styrbar/öppnare system? Gäller också en processor system

Computer Architecture Laboratory - CAL - 12 CAL Observable and controllable, Shared Pool of Computer Resources... Important, Important... the key to faster verification and better analyse of RT-system

Computer Architecture Laboratory - CAL - 13 CAL Observable and controllable Road Map for ASIC Design # gates pro week Verification ASIC Design ?

Computer Architecture Laboratory - CAL - 14 CAL Efficiency and Higher Performance Low Hardware and Software Overhead (simplifications), state-of-the-art high performance commercial standard microprocessors, buses etc. Hardware faster then software

Computer Architecture Laboratory - CAL - 15 CAL Cost/realtime performance, ASIC designs Standard Components, IP etc. Standard Software and debuggers System on Chip......

Computer Architecture Laboratory - CAL - 16 CAL Fault tolerance, Better Task Memory Manager Better Watchdog functions Better Scheduling algoritms etc.

Computer Architecture Laboratory - CAL - 17 CAL SARA 98-99

Computer Architecture Laboratory - CAL - 18 CAL SARA 98 - status today -

Computer Architecture Laboratory - CAL - 19 CAL Conclusion and future work