TTIT61 Nachos - short introduction Gert Jervan IDA/SaS/ESLAB

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -2- Introduction Course:Concurrent Programming and Operating Systems TTIT61 Homepage: check regularly read messages section

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -3- Laboratory Assignments “This is the planet where Nachos rule” Nachos Univ. Lab 1: Threads and Synchronization Lab 2: System Calls and Memory Management Lab 3: Translation Lookaside Buffers (TLBs) All labs are build upon the previous labs

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -4- Laboratory Sessions Sun machines C++ Be prepared –Tools: (x)emacs, gmake, gdb (ddd / xddd), man => No support without using debugger before! Mark your changes in the source code Demonstrate working solution

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -5- Laboratory Sessions Documentation –A readme file which contains: The files you have created and a short description The major changes you have made to the given files –A testcase file which contains: Which test cases did you use What was the output of the test cases Whate those testcases should demonstrate

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -6- Laboratory Sessions Marking changes // // : your_name: changed... // end of changes //

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -7- Laboratory Sessions File header // ========================================== // TTIT61: Lab 1: solution.cpp // // Group XYZ: Mister X / Miss Y // // This module extends Nachos to be able to work // with semaphors. // // : misterX: created // : missY: semSignal: changed signal type // ===========================================

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -8- Laboratory Sessions Function header // // int readInput(int file) // // This function reads continuously from the // file and returns the number of bytes read // // Parameters: // file: handle of the file to read from //

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -9- Tips Read documentation and source code Use a debugger (gdb / ddd) Use code browsing tools (emacs) Use different test cases Read homepage regularly

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -10- Nachos Overview “Not Another Completely Heuristic Operating System” Free operating system and simulation environment to study an operating system Runs as a single Unix process (real operating systems run on bare machines) Simulates low-level facilities (including interrupts, virtual memory and interrupt-driven device I/O) Implemented in subset of C++, ca lines of code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -11- Nachos Overview Nachos simulates a machine approximating a real machines architecture Has: –Registers, Memory, CPU, Event-driven simulated clock Can execute arbitrary programs Two modes: simulator (running programs) and “kernel mode” (starting up or reacting on hardware traps)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -12- Object Machine Available through variable machine Public attributes: –registers (array of 40 registers including stack pointer, program counter, etc.) –mainMemory (byte-addressable, organised into 128-byte pages, 31 pages) –Virtual Memory (single linear page and software-managed TLB) Methods: Machine (constructor), Translate (translates virtual addresses), OneInstruction, Run, ReadRegister, WriteRegister, ReadMem, WriteMem => Read documentation and source code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -13- Interrupt Management Nachos simulates interrupts with an event queue and a clock (clock ticks  queue is examined for pending events) The clock ticks, when... –Interrupts are restored (used often for mutual exclusion purposes) –One instruction is executed –“Ready list” is empty Object Interrupt: –Main methods: Schedule (schedule event), SetLevel (disable / enable), OneTick => Read documentation / source code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -14- Address Translation Nachos supports two virtual memory architectures: –Linear page tables (easier to program) –Software-managed TLB (closer to what current machines support) –Only one at a time Linear page tables: –Virtual address: page number and page offset –Physical address: machine->mainMemory + n * PageSize + m Read documentation / source code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -15- Threads Overview Process: –Address space (memory allowed to reference: code, stack, heap, dynamically allocated memory) –Single thread of control –Other objects (open file descriptors, etc.) –=> program, data, state information (memory, registers, etc.) Threads (Nachos): –Executing the same code –(big difference) Global variables are shared among all threads (=> synchronisation?, mutual exclusion?)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -16- Object Thread Object Thread methods: –Thread (constructor) –Fork (making thread executable) –StackAllocate –Yield (suspend and select next waiting one) –Sleep (suspend) –Finish (terminate) Read documentation / source code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -17- Thread switching Suspend current thread Save thread state (registers) Restore state of of thread to switch to => function Switch(oldThread, nextThread) (written in assembly language)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -18- Threads and Scheduling Ready list (threads which are ready to run) Scheduler decides which thread to run next (invoked whenever the current thread gives up the CPU) –Nachos: unprioritized, round-robin fashion Object Scheduler methods: –ReadyToRun (place thread in ready list) –FindNextToRun –Run

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -19- Synchronisation and Mutual Exclusion Mutual exclusion achieved by disabling / enabling interrupts Synchronisation provided through semaphores Object Semaphore methods: –Semaphore (constructor) –P (decrement semaphore’s counter; blocking caller if 0) (wait) –V (increment semaphore’s counter, releasing one thread if any are blocked) (signal)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -20- System calls & memory management - overview User programs run in private address spaces Nachos can run any binary (only using system calls that Nachos understands) Conversion of binaries (coff to Noff format, see documentation) Nachos, executing a program (Creating a process): –Create address space –Allocate physical memory for the address space –Load executable (instructions, initialised variables) into memory –Zero memory for uninitialised variable –Initialise registers and address translation tables –Run

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -21- System Calls and Exception Handling Systems calls are invoked by the “syscall” instruction (generates hardware trap into the kernel, no parameter => system call ID in register r2) Traps are implemented by invoking the RaiseException function (which calls the ExecptionHandler) Read documentation / source code

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -22- Lab1: Threads and Synchronization You will have: –Part of a working thread system and an implementation of semaphores You have to: –Write the missing code (for locks and condition variables) and to test it

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -23- How to do it Read and understand the partial thread system given to you ($HOME/nachos-3.4/code/threads) Run it in debugger and trace the execution path. Follow the state of each thread and keep track which procedures are each thread’s execution stack.

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -24- Threads Nachos threads are in one of four states: –READY, RUNNING, BLOCKED, JUST_CREATED The scheduler decides which thread to run next Synchronisation facilities are provided through semaphores

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -25- What to do. Part 1 You will have classes Semaphore, Lock and Condition Semaphore is already implemented; Lock and Condition (together will give the same functionality as monitor) should be implemented

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -26- How to implement Interfaces for Lock and Condition are provided ($HOME/nachos-3.4/code/threads/synch.h) You have to implement the interface (don’t change it!) NB! It should not take you very much code to implement.

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -27- What to do. Part 2 Test your implementation –Write a class BoundedBuffer (Silberschatz, p. 172) and use it for producer/consumer communication. –Don’t forget border conditions: empty buffer, full buffer –Try several producers and/or consumers

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -28- Lab 2: System Calls and Memory Management Each user program runs with its own memory The communication between the kernel and the user program is done by system calls System call causes an exception (interrupt) All the communication to the kernel goes through an exception handler

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -29- How to do it Read and understand the part of the system given to you (mainly $HOME/nachos-3.4/code/userprog) Play around with example ‘halt’ in $HOME/nachos- 3.4/code/test (start as ‘nachos -x../test/halt’) Trace, what happens, as the program gets loaded, runs, and invokes the system call

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -30- Part1: SC; What to do Implement all system calls defined Compile programs to MIPS machine code (using provided cross compiler) and link (use provided Makefile as an example) Debug & test your implementations

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -31- Part1: SC; How to implement Interfaces for system calls are provided ($HOME/nachos-3.4/code/userprog/syscall.h) You have to implement the interface (don’t change it!)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -32- Part2: the MM; What to do Given system allows to run one user program at a time You have to allow several user programs to reside simultaneously in the primary memory Test the implementation by implementing multiprogramming with time-slicing

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -33- Lab 3: TLBs (Overview) “Allows execution of processes that may be not completely in memory” Nachos supports virtual memory architectures: –Linear page tables (easier to program) –Software-managed Translation Lookaside Buffers (TLB) (closer to what current machines support)

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -34- Address Translation –Virtual address: page number and page offset –Physical address: machine->mainMemory + n*PageSize + m Linear page tables CPU pd logical address TLB miss physical memory fd physical address p page table

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -35- Translation Lookaside Buffers Used for caching between physical memory and CPU for faster access CPU pq logical address page number frame number TLB miss TLB physical memory fd physical address TLB hit p page table Exception: Fetch physical page # from process page table Resume execution from the same PC

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -36- TLBs 4 entries in Nachos machine TLB is invalid after a context switch Write code in ExceptionHandler to handle the PageFaultExceptions caused by TLB misses invalidate the TLB when switching contexts Synchronize the TLB and process page table entries.

Gert Jervan, IDA/SaS/ESLAB TTIT61 Lab Intro -37- How to survive Read the code that is handed out with the assignment first, until you pretty much understand it. Start with the “.h” files. Don’t code until you understand what you are doing. Design, design, design first. Only then split up what each of you will code. Talk to as many other people as possible. CS is learned by talking to others, not by reading, or so it seems to me now. after successful finish with Nachos