Lectures Week 8 The operational amplifier (“op amp”) Feedback

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Lectures Week 8 The operational amplifier (“op amp”) Feedback Comparator circuits Ideal op amp Unity-gain voltage follower circuit Reading Ch. 14, Secs. 14.1-14.3, 14.5-14.7 lightly, 14.8-14.9, 14.10 lightly EE 42/100 Fall 2005 Week 8, Prof. White

The Operational Amplifier The operational amplifier (“op amp”) is a basic building block used in analog circuits. Its behavior is modeled using a dependent source. When combined with resistors, capacitors, and inductors, it can perform various useful functions: amplification/scaling of an input signal sign changing (inversion) of an input signal addition of multiple input signals subtraction of one input signal from another integration (over time) of an input signal differentiation (with respect to time) of an input signal analog filtering nonlinear functions like exponential, log, sqrt, etc. EE 42/100 Fall 2005 Week 8, Prof. White

Op Amp Circuit Symbol and Terminals V + positive power supply non-inverting input + – output inverting input V – negative power supply The output voltage can range from V – to V + (“rails”) The positive and negative power supply voltages do not have to be equal in magnitude (example: 0V and +3V DC supplies) EE 42/100 Fall 2005 Week 8, Prof. White

Op Amp Terminal Voltages and Currents All voltages are referenced to a common node. Current reference directions are into the op amp. V + ic+ ip + – io + vp – in + vo – + vn – ic- V – – Vcc + + Vcc – common node (external to the op amp) EE 42/100 Fall 2005 Week 8, Prof. White

Op-Amp Voltage Transfer Characteristic The op-amp is basically a differentiating amplifier: Vcc slope = A >>1 vid = vp–vn -Vcc Regions of operation: “negative saturation” “linear” “positive saturation”  In the linear region, vo = A (vp – vn) = A vid where A is the open-loop gain  Typically, Vcc  20 V and A > 104 linear range: -2 mV  vid = (vp – vn)  2 mV Thus, for an op-amp to operate in the linear region, vp  vn (i.e., there is a “virtual short” between the input terminals.) EE 42/100 Fall 2005 Week 8, Prof. White

Achieving a “Virtual Short” Recall the voltage transfer characteristic of an op-amp: Q: How does a circuit maintain a virtual short at the input of an op-amp, to ensure operation in the linear region? A: By using negative feedback. A signal is fed back from the output to the inverting input terminal, effecting a stable circuit connection. Operation in the linear region enforces the virtual short circuit. Plotted using different scales for vo and vp–vn Plotted using similar scales for vo and vp–vn vo vo Vcc Vcc ~10 V slope = A >>1 slope = A >>1 ~10 V vp–vn vp–vn -Vcc -Vcc ~1 mV ~10 V EE 42/100 Fall 2005 Week 8, Prof. White

Negative vs. Positive Feedback Familiar examples of negative feedback: Thermostat controlling room temperature Driver controlling direction of automobile Pupil diameter adjustment to light intensity Familiar examples of positive feedback: Microphone “squawk” in sound system Mechanical bi-stability in light switches Fundamentally pushes toward stability Fundamentally pushes toward instability or bi-stability EE 42/100 Fall 2005 Week 8, Prof. White

Op Amp Operation without Negative Feedback (Comparator Circuits for Analog-to-Digital Signal Conversion) 1. Simple comparator with 1 Volt threshold:  V– is set to 0 Volts (logic “0”)  V+ is set to 2 Volts (logic “1”)  A = 100 V0 VIN 1 2 If VIN > 1.01 V, V0 = 2V = Logic “1” +  V0 VIN 1V If VIN < 0.99 V, V0 = 0V = Logic “0” 2. Simple inverter with 1 Volt threshold:  V– is set to 0 Volts (logic “0”)  V+ is set to 2 Volts (logic “1”)  A = 100 VIN 1 2 V0 If VIN > 1.01 V, V0 = 0V = Logic “0” If VIN < 0.99 V, V0 = 2V = Logic “1” +  V0 VIN 1V EE 42/100 Fall 2005 Week 8, Prof. White

Op Amp Circuits with Negative Feedback Q: How do we know whether an op-amp is operating in the linear region? A: We don’t, a priori. Assume that the op-amp is operating in the linear region and solve for vo in the op-amp circuit. If the calculated value of vo is within the range from -Vcc to +Vcc, then the assumption of linear operation might be valid. We also need stability – usually assumed for negative feedback. If the calculated value of vo is greater than Vcc, then the assumption of linear operation was invalid, and the op-amp output voltage is saturated at Vcc. If the calculated value of vo is less than -Vcc, then the assumption of linear operation was invalid, and the op-amp output voltage is saturated at -Vcc. EE 42/100 Fall 2005 Week 8, Prof. White

Op Amp Circuit Model (Linear Region) Ri is the equivalent resistance “seen” at the input terminals, typically very large (>1MW, as large as 1012 W for FET input op-amps), so that the input current is usually very small: ip = –in  0 ip vp Ro io Ri vo + – A(vp–vn) in vn Note that significant output current (io) can flow when ip and in are negligible! EE 42/100 Fall 2005 Week 8, Prof. White

ip = –in= 0 vp = vn ip + – io + vp – in + vo – + vn – Ideal Op-Amp Assumptions: Ri is large (105 W) A is large (104) Ro is small (<100 W) Simplified circuit symbol: power-supply terminals and dc power supplies not shown ip = –in= 0 vp = vn ip + – io + vp – in + vo – Note: The resistances used in an op-amp circuit must be much larger than Ro and much smaller than Ri in order for the ideal op-amp equations to be accurate. + vn – EE 42/100 Fall 2005 Week 8, Prof. White

Unity-Gain Voltage-Follower Circuit +  VIN vn V0(V) VIN(V) 1 2 IIN vp vp = vn  V0 = VIN ( valid as long as V –  V0  V + ) Note that the analysis of this simple (but important) circuit required only one of the ideal op-amp rules. Q: Why is this circuit important (i.e., what is it good for)? A: A “weak” source can drive a “heavy” load; in other words, the source VIN only needs to supply a little power (since IIN = 0), whereas the output can drive a power-hungry load (with the op-amp providing the power). EE 42/100 Fall 2005 Week 8, Prof. White

What’s Inside an Op-Amp? EE 42/100 Fall 2005 Week 8, Prof. White

Lecture Week 8 (continued) Op-Amp circuits continued: examples: Inverting amplifier circuit Summing amplifier circuit Non-inverting amplifier circuit Differential amplifier circuit Current-to-voltage converter circuit Reading (Note: amplifiers are discussed in great detail in Ch. 11) EE 42/100 Fall 2005 Week 8, Prof. White

Review: Negative Feedback Negative feedback is used to “linearize” a high-gain differential amplifier. With feedback Without feedback V0 +  VIN V0 +  V+ V V0(V) V0 5 5 4 3 2 1 VIN 1 2 3 4 5 5 EE 42/100 Fall 2005 Week 8, Prof. White

Gain vs. Frequency of the Basic Op-Amp without and with Feedback (Hambley, Sec. 14.5) Facts: The open-loop gain of an op--amp (no feedback from output to inverting input) is constant from DC to a frequency fBOL, after which the open-loop gain drops at a rate of -20dB/decade of frequency (Fig. 14.20 – next slide). As the negative feedback is made stronger, the gain decreases but the bandwidth of the amplifier increases. (Bandwidth of an amplifier is the frequency range over which it amplifies.) One can show (Hambley) that the product of the dc gain and the bandwidth is a constant that is independent of the amount of negative feedback. This is called the gain-bandwidth product for the op-amp. Example: The op-amp you’ll use in the lab (National Semiconductor LMC6482) is rather like that shown in Hambley Fig. 14.22, with a DC open-loop gain of 100 dB (voltage amplification of 105) out to about only 40 Hz! With negative feedback, however, the amplifier has an increasing bandwidth but with decreasing gain. The unity gain (0 dB) bandwidth is 4 MHz; one can get 40 dB of gain (Vout/Vin = 100) from DC to about 40 kHz. EE 42/100 Fall 2005 Week 8, Prof. White

Op-Amp Frequency Response with and without Negative Feedback EE 42/100 Fall 2005 Week 8, Prof. White

Application of Voltage Follower: Sample and Hold Circuit EE 42/100 Fall 2005 Week 8, Prof. White

Inverting Amplifier Circuit Rf is Rs in – + + vn – + vo – vs + – + vp – in = 0  is = -if vp = 0  vn = 0 EE 42/100 Fall 2005 Week 8, Prof. White

Analysis using Realistic Op-Amp Model In the analysis on the previous slide, the op-amp was assumed to be ideal, i.e. Ri = ; A = ; Ro = 0 In reality, an op-amp has finite Ri, finite A, non-zero Ro, and usually is loaded at its output terminals with a load resistance RL. EE 42/100 Fall 2005 Week 8, Prof. White

Summing Amplifier Circuit Ra ia if Rf Rb in va + – ib – + + vn – + vo – vb + – ic + vp – superposition ! Rc vc + – in = 0  ia + ib + ic = -if vp = 0  vn = 0 EE 42/100 Fall 2005 Week 8, Prof. White

Application: Digital-to-Analog Conversion A DAC can be used to convert the digital representation of an audio signal into an analog voltage that is then used to drive speakers -- so that you can hear it! Binary Analog number output (volts) 0 1 .5 “Weighted-adder D/A converter” 0 1 0 1 0 1 1 0 1 0 1.5 2 4-Bit D/A 8V - + V0 5K 80K 40K 20K 10K S1 + - S3 S2 S4 0 1 0 1 0 1 1 0 1 2.5 3 3.5 4 1 0 0 1 1 0 1 0 1 0 1 1 4.5 5 5.5 6 6.5 7 7.5 S1 closed if LSB =1 S2 " if next bit = 1 S3 " if " " = 1 S4 " if MSB = 1 (Transistors are used as electronic switches) MSB LSB EE 42/100 Fall 2005 Week 8, Prof. White

Characteristic of 4-Bit DAC 8 7 6 5 Analog Output (V) 4 3 2 1 2 4 6 8 10 12 14 16 0000 0001 1111 1000 0100 Digital Input EE 42/100 Fall 2005 Week 8, Prof. White

Noninverting Amplifier Circuit Rf Rs in – + + ip vn + vo – + – Rg vg + – vp – ip = 0  vp = vg  vn = vg in = 0  Rs & Rf form a voltage divider EE 42/100 Fall 2005 Week 8, Prof. White

Differential Amplifier Circuit Ra Rb in + vn – va + – Rc – + ip + vo – + vp – vb + – Rd in = 0  ip = 0  EE 42/100 Fall 2005 Week 8, Prof. White

Differential Amplifier (cont’d) More usual version of differential amplifier (Horowitz & Hill, “Art of Electronics”, 2nd Ed., p. 184-5 (part of their “smorgasbord” of op-amp circuits): Let Ra = Rc = R1 and Rb = Rd = R2 Then v0 = (R2 / R1)(vb – va) To get good “common-mode rejection” (next slide) you need well-matched resistors (Ra and Rc, Rb and Rd), such as 100kW 0.01% resistors EE 42/100 Fall 2005 Week 8, Prof. White

Differential Amplifier – Another Perspective Redefine the inputs in terms of two other voltages: 1. differential mode input vdm  vb – va 2. common mode input vcm  (va + vb)/2 so that va = vcm – (vdm/2) and vb = vcm + (vdm/2) Then it can be shown that “common mode gain” “differential mode gain” EE 42/100 Fall 2005 Week 8, Prof. White

Differential Amplifier (cont’d) An ideal differential amplifier amplifies only the differential mode portion of the input voltage, and eliminates the common mode portion. provides immunity to noise (common to both inputs) If the resistors are not perfectly matched, the common mode rejection ratio (CMRR) is finite: EE 42/100 Fall 2005 Week 8, Prof. White

Op-Amp Current-to-Voltage Converter EE 42/100 Fall 2005 Week 8, Prof. White

Summary Voltage transfer characteristic of op-amp: A feedback path between an op-amp’s output and its inverting input can force the op-amp to operate in its linear region, where vo = A (vp – vn) An ideal op amp has infinite input resistance Ri, infinite open-loop gain A, and zero output resistance Ro. As a result, the input voltages and currents are constrained: vp = vn and ip = -in = 0 vo Vcc ~10 V slope = A >>1 vp–vn -Vcc ~1 mV EE 42/100 Fall 2005 Week 8, Prof. White

EE 42/100 Fall 2005 Week 8, Prof. White

EE 42/100 Fall 2005 Week 8, Prof. White

EE 42/100 Fall 2005 Week 8, Prof. White

Differentiator (from Horowitz & Hill) EE 42/100 Fall 2005 Week 8, Prof. White

Op-Amp Imperfections Discussed in Hambley, pp. 651-665 (of interest if you need to use an op-amp in a practical application!) Linear range of operation: Input and output impedances not ideal values; gain and bandwidth limitations (including gain-bandwidth product); Nonlinear limitations: Output voltage swing (limited by “rails” and more); output current limits; slew-rate limited (how fast can the output voltage change: 0.5V/ms for the 741 op-amp, to 6000V/ms for high slew-rate op-amp); full-power bandwidth DC imperfections: Offset current (input currents don’t sum exactly to zero); offset voltage; There are pins (denoted offsets) for inputs to help control this. EE 42/100 Fall 2005 Week 8, Prof. White