Synchronization in Digital Communication By: Bader Al-Kandari and Josh Mason Advisors: Dr. Thomas L. Stewart, Dr. In Soo Ahn
Project Design Review Contents Project Summary Functional Description Transmitter/Receiver Block Diagrams Hardware/Software Preliminary Results Original Work Schedule Work Completed Revised Work Schedule Questions?
The purpose of this project is the development of a Quadrature Amplitude Modulation (QAM) signal communication system in order to test synchronization methods of digital communication systems.
Functional Description
Inputs TransmitterTransmitter Signals from a function generator Stored Data ReceiverReceiver QAM signal Stored Data
Functional Description Outputs TransmitterTransmitter QAM signal ReceiverReceiver Recovered Data Matlab/Simulink Data Acquisition
Functional Description Modes of Operation Transmitter – Real Time Modulation Receiver – Real Time Demodulation
Transmitter Block Diagram
Transmitter Block Diagram Transmitter Block Diagram
Transmitter Block Diagram
Adaptable for stored data inputs Differential Coding Possibility of M-Level QAM
Receiver Block Diagram
Hardware/Software TI c6713 DSP 8 KHz, 32 KHz, 44.1 KHz, 48 KHz, and 96 KHz8 KHz, 32 KHz, 44.1 KHz, 48 KHz, and 96 KHz Matlab/Simulink Code Composer Studio
Preliminary Results QAM Simulink Development 4-QAM Transmit/Receive4-QAM Transmit/Receive DSP interfacing/testing Digital filteringDigital filtering Analog source Data Source
Original Schedule PracticalTheoretical 12/1/2005Proposal PresentationProposal Presentation Winter BreakWork on WebsiteWork on Phase distortion 1/24/2006Fully Develop DSP I/O correction 1/31/2006w/ Matlab/Simulink 1/31/2006w/ Matlab/Simulink 2/7/2006Begin Documentation 2/7/2006Begin Documentation 2/14/2006Test/gather data ofFinalize 4-QAM 2/21/2006implemented 4-QAM 2/21/2006implemented 4-QAM 2/28/2006Documentation/TutorialFinish up any remaining 3/7/2006Workphase distortion problems 3/21/20068-QAM testing/data 3/21/20068-QAM testing/data 3/28/2006gatheringBegin work on 8-QAM 4/4/2006Documentation/Tutorialand 16-QAM 4/11/ QAM testing 4/11/ QAM testing 4/18/2006DocumentationDocumentation 4/25/2006PresentationPresentation 5/2/2006
Tasks Completed RTDX Testing Phase Tracking using Phase Lock Loop
RTDX Testing Success Using m-files Unable to succeed using block diagram modeling
RTDX Testing (m-file) M-file has RTDX input channel and output channel Increments the values of an array passed into the input channel Program then reads the output channel Literally runs on DSP
RTDX Testing (m-file) [ ]
RTDX Testing (m-file)
RTDX Testing (Block Diagram)
PLL Subsystems Phase Detector (PD) Loop Filter (LF) Oscillator [1]Voltage Controlled (VCO) [1]Voltage Controlled (VCO) [2]Direct Digital Synthesizer (DDS) [2]Direct Digital Synthesizer (DDS)
PD Implementation
PD models Inverse tangent model “Cross product terms” (CPT) model
Comparison Atan2 PD CPT PD
Loop Filter
Design equations for LF
LF Loop filter is PI integrator Why? y(n) = y(n-1) + k1*x(n) + k2*x(n-1)
DDS
DDS Simulation Frequency = 40 Hz
Complete model
Model on 6713
Simulation parameters and specs Input frequency = 42 Hz LF natural frequency = 5 Hz DDS running frequency = 40 Hz Fs = 8000 Hz
Simulation results
Laboratory results
Phase error
Filter output at 41 Hz
What’s Left Differential Coding 2-D Slicer Automatic Gain Control Symbol Timing RTDX or Comparative Method
Revised Project Schedule Bader Al-KandariJosh Mason 3/7/2006Fully Debug PLL + DocumentRTDX + Document BreakResearch Symbol TimingResearch Diff Coding 3/21/2006Symbol TimingDifferential Coding 3/28/2006Symbol TimingDifferential Coding 4/4/20062-D SlicerDiffCoding/Prepare for Student EXPO 4/11/20062-D SlicerData Preparations 4/18/2006Automatic Gain Control 4/25/2006Documentation 5/2/2006Presentation
Questions? != 45
Inverse tan PD
Atan2 simulation results
Lab results