Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming.

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Presentation transcript:

Silicon Programming--Altera Tools1 “Silicon Programming“ programmable logic Altera devices and the Altera tools major tasks in the silicon programming process using a “.vec” file for testing (note: references are to textbook by Hamblen et al)

Silicon Programming--Altera Tools2

3

4 LE (Logic Element) LAB (Logic Array Block) RAM Block

Silicon Programming--Altera Tools5 Device families: Example: “Cyclone”—we will use EP1C6 or EP1C2 features: »logic elements (LE’s) »RAM blocks »Global clock + Phase locked loops for clock configuration »>= 170 I/O pins Cyclone LE—figure 3.7 Cyclone LABs and interconnects: figure 3.9

Silicon Programming--Altera Tools6 Example: using a lookup table to describe a gate network: f(A,B,C) = A'B'C + A'BC' + A'BC + ABC Inputs: ABCout

Silicon Programming--Altera Tools7 Other common architectures: Product Term CPLD: Altera MAX 7000S uses matrix of produce terms; can expand to neighboring “macrocells” Figures 3.5, 3.6 Configurable logic blocks (CLB): Xilinx 4000 Figure 3.12

Silicon Programming--Altera Tools8

9

10 power VGA port parallel port PS2 port +3.3V supply LED on/off switch user-definable pushbuttons user-definable LEDs user-definable DIP switches global reset USB port serial port invalid input voltage LED UP3 BOARD and FLASH SRAM Cyclone chip +5V supply LED LC Display

Silicon Programming--Altera Tools11 Technology: SRAM General description: General information on “programmable” devices:

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