Data Protection Card Submit: Assaf Matia Technion Guide: Eran Segev Rafael Guide: Henri Delmar Winter & Spring 2004

Project Goal Design small communication & storage card based on common Technologies.

Project Requirement Saving parameters in external unit Small, Mobile and Source free unit Operate as Test Equipment for the system Handle communication with different units Receive, Transmit and Storage capabilities Data validation Modification flexibility

Project Demands Low cost Memory size Data type A – 10K byte, Data type B – 2M byrte Minimum power ( <1watt) 2 separate serial communication units Small physical size Software - minimum complexity User interface – buttons + LED (LCD optional) Debug – minimum complexity

Micro Controller Block Diagram Data B Memory Transceiver DC to DC uCONT RX TX V+ V- Hardware Ident. lines Debug Interface Push Buttons & Display Data A memory 2X USART Program memory

FPGA Block Diagram Data B Memory DC to DC FPGA V+ V- Hardware Ident. lines Debug Interface Push Buttons & Display 2X USART Data A Memory Program Memory Transceiver RX TX

Comparison Cost uCONT: 10$ - 30$ FPGA: >50$ Power uCONT 10mW,300mW FPGA 100mW,400mW FPGAuC Cost+++++ Power+++++

Comparison – Cont. Memory Size uCONT Non volatile internal memory Of 60Kbyte FPGA No Non volatile int. memory 2Mbyte ext. memory in both options. FPGAuC Cost+++++ Power+++++ Mem Size-+++

Comparison – Cont. Memory Access - Serial uCONT Easy spi comm. Use 1 usart FPGA Need spi module FPGAuC Cost+++++ Power+++++ Mem Size-+++ MEM Ser.++

Comparison – Cont. Memory Access - Parallel uCONT Ext: ~4 Prots usage Int: easy access FPGA Ext: a lot of free I/O ports Int: not exist FPGAuC Cost+++++ Power+++++ Mem Size-+++ Mem Ser.++ Mem Par.++

Comparison – Cont. USART uCONT High speed (>115Kbps) 2-3 usart (memory depend) FPGA Speed limited Flexabile number of usart FPGAuC Cost+++++ Power+++++ Mem Size-+++ Mem Ser.++ Mem Par.++ USART+++++

Comparision – Cont. Programing uCONT Low-medium complex High cost FPGA Medium-high complex Low cost FPGAuC Cost+++++ Power+++++ Mem Size-+++ Mem Ser.++ Mem Par.++ USART+++++ Program+++++

Comparision – Cont. Area uCONT < FPGA size & ext prog memory. Debug uCONT easier than FPGA FPGAuC Cost+++++ Power+++++ Mem Size-+++ Mem use.++ USART+++++ Program++++ Area+++++ Debug++++

Comparision – Cont. User interface LCD (optional) uCONT Easy implement Menu – easy operate FPGA Complex implement Menu – very complex operate FPGAuC Cost+++++ Power+++++ Mem Size-+++ Mem use.++ USART+++++ Program++++ Area+++++ Debug+++++ User++++

Comparision - result Device to use – micro controller High complexity for FPGA Less component and power for uCONT uCONT is More flexibility to changes Harder debug for FPGA

2 weeks – choosing uCONT, Memory. 2-3 weeks – card design with evaluation board. Semester A - Schedule