SPISPI Term Dr Abdelhafid Bouhraoua Term Dr Abdelhafid Bouhraoua

SPI Overview SPI stands for Serial Peripheral Interface Used for moving data simply and quickly from one device to another Serial Interface Synchronous Master-Slave Data Exchange SPI stands for Serial Peripheral Interface Used for moving data simply and quickly from one device to another Serial Interface Synchronous Master-Slave Data Exchange

SPI – Synchronous Protocol SPI is a Synchronous protocol The data is clocked along with a clock signal (SCK) The clock signal controls when data is changed and when it should be read (sampled or clocked) Since SPI is synchronous, the clock rate can vary, unlike RS-232 style communications SPI is a Synchronous protocol The data is clocked along with a clock signal (SCK) The clock signal controls when data is changed and when it should be read (sampled or clocked) Since SPI is synchronous, the clock rate can vary, unlike RS-232 style communications

SPI – Master-Slave SPI is a Master-Slave protocol The Master device controls the clock (SCLK) No data is transferred unless a clock signal is present All slaves are controlled by the master clock The slave devices may not manipulate the SPI is a Master-Slave protocol SPI is a Master-Slave protocol The Master device controls the clock (SCLK) No data is transferred unless a clock signal is present All slaves are controlled by the master clock The slave devices may not manipulate the SPI is a Master-Slave protocol

SPI – Data Exchange SPI is a Data Exchange protocol As data is being clocked out, new data is clocked in Data is exchanged - no device can just be a transmitter only or receiver only (with exceptions) The master controls the exchange by manipulating the clock line (SCK) SPI is a Data Exchange protocol As data is being clocked out, new data is clocked in Data is exchanged - no device can just be a transmitter only or receiver only (with exceptions) The master controls the exchange by manipulating the clock line (SCK)

SPI – Data Exchange (cont.) Often a signal controls when a device is accessed - this is the CS or SS signal CS or SS signal is known as “Chip Select” or “Slave Select” Often a signal controls when a device is accessed - this is the CS or SS signal CS or SS signal is known as “Chip Select” or “Slave Select”

SPI - Signals SCLK or MCLK: SPI Clock or Master Clock MOSI: Master Out Slave In; also sometimes called SDO: Serial Data Out MISO: Master In Slave Out; also sometimes called SDI: Serial Data In SS or CS: Multiple instances to individually select each slave individually SCLK or MCLK: SPI Clock or Master Clock MOSI: Master Out Slave In; also sometimes called SDO: Serial Data Out MISO: Master In Slave Out; also sometimes called SDI: Serial Data In SS or CS: Multiple instances to individually select each slave individually

SPI - Architecture Master SS0SS1SS2SCLKMOSIMISO Slave 0 SSSCLKMOSIMISO Slave 1 SSSCLKMOSIMISO Slave 2 SSSCLKMOSIMISO

SPI – Data Clocking Data is only output during the rising or falling edge of SCK Data is latched during the opposite edge of SCLK The opposite edge is used to ensure data is valid at the time of reading Data is only output during the rising or falling edge of SCK Data is latched during the opposite edge of SCLK The opposite edge is used to ensure data is valid at the time of reading

Typical Transfer In This example : Number of bits transferred are device-specific and NOT part of the protocol –6 bits are sent from Master to Slave –5 bits are sent from Slave to Master Data changes on falling edge and is sampled on rising edge of the clock In This example : Number of bits transferred are device-specific and NOT part of the protocol –6 bits are sent from Master to Slave –5 bits are sent from Slave to Master Data changes on falling edge and is sampled on rising edge of the clock SSSS ____ SCLKSCLK MOSIMOSI MISOMISO

Examples Of SPI Slaves Microchip 25LC256; a 256K-bits EEPROM with SPI interface Microchip MCP3204; A 12-bits ADC with SPI interface VLSI VS1002; A MP3 player chip with SPI interfaces (control and data) Microchip 25LC256; a 256K-bits EEPROM with SPI interface Microchip MCP3204; A 12-bits ADC with SPI interface VLSI VS1002; A MP3 player chip with SPI interfaces (control and data)

Microchip 25LC256 Interface Byte Read Sequence

Microchip 25LC256 Byte Write Sequence

Microchip 25LC256 Page Write Sequence

Microchip 25LC256 Read Status Register Sequence

Microchip MCP3204 Interface Conversion

VLSI VS1002 Interface

VS1002 Control Only Interface

VS1002 Combined Control And Data Interfaces Writing Control Bytes … and Data Bytes