Computer System Structures memory memory controller disk controller disk controller printer controller printer controller tape-drive controller tape-drive controller disk printer tape CPU System bus

Interrupts n Signal sent to the CPU by hardware or software n Hardware triggers an interrupt when an event occurs n Software triggers an interrupt when a system call is performed – This is often called a trap

How Interrupts Work n When interrupt occurs, the current program stops execution n The interrupt service routine is executed n When routine is finished, the current program resumes n This is much like a function call except it is done by the hardware

Interrupt Service Routine n Each device does something different when interrupted n Each device must have a different interrupt service routine n A table of interrupt service routines is kept by the hardware. This table is called the interrupt vector and is indexed by the interrupt number

Interrupt Occurs n Current program stops n Using the interrupt number, the starting address of the ISR is found in the IV by indexing with the interrupt number n The ISR executes n When ISR completes, the current program continues execution

Interrupts: Priorities n An interrupt may occur when and ISR is executing. n Each interrupt has a priority, and the highest priority interrupt continues n If an interrupt interrupts another ISR, information must be placed on a stack so execution can continue when ISR finishes

Interrupts: Enable and Disable n If disabled, the current ISR cannot be interrupted n If enabled, the current ISR is interrupted if the interrupt has a higher priority than the current interrupt

Modern Operating Systems n Interrupt driven n If there is nothing to do, the OS waits n When an event occurs, the OS is interrupted and the event is handled n When a system call is done, a trap occurs n The proper system routine is executed n Control is then returned to the routine that called the system routine

I/O Structure n When a routine needs I/O, a system call is done n The OS consults the device status table to get the device’s types, address, and state n The device status table is updated to indicate the I/O needed n When the I/O is completed, the OS is interrupted and control returns to the user

DMA Transfer n Some devices maintain a buffer where the data is kept n The OS must copy the buffer when complete or I/O can’t continue n It would be better if the device could put the data directly into memory

DMA Transfer (cont.) CPU Memory I/O devices I/O instructions

DMA Transfer (cont.) n Data is placed directly in memory n This is done using cycle stealing – The DMA controller steals memory cycles from the CPU – This can slow down the CPU because it may have to wait to get data from memory

Storage Structure n Registers - associated with CPU n Cache - intermediate between CPU and memory n Main memory - where CPU obtains data n Secondary storage - permanent storage capacity – Disks - large capacity – Tapes - larger capacity – CDs - only readable

Disk Sector Track Platter

Hardware Protection n Dual-Mode operation n I/O protection n Memory protection n CPU protection

Dual-Mode Operation n Provides hardware support for two modes: – User mode - execution is done in behalf of a user – Monitor mode (supervisor mode or system mode) - execution is done in behalf of the OS n This insures that programs can’t do things they shouldn’t

Dual-Mode Operation (cont.) n Mode bit indicates which mode CPU is in n When an interrupt or trap occurs, hardware switches to monitor mode n When interrupt or trap is finished, hardware switches to user mode n Privileged instructions can only be issued in monitor mode

I/O Protection n All I/O instructions are privileged instructions n This insures that a user can’t execute instructions that could mess up the machine

Memory Protection n OS must keep users within their own memory n This is done using two registers: – Base register - start of the user’s memory – Limit register - size of the user’s memory n A checks is done by the hardware that insures that every memory access is inside the user’s memory space

CPU Protection n Timer - interrupts CPU after a specified period to insure the OS maintains control – Timer is decremented every clock tick – When timer reaches zero, an interrupt occurs n Timer is used for time sharing n Timer is used to compute the current time n Load-timer is a privileged instruction