Implementation of Basic Digital Filter Structures R.C. Maher ECEN4002/5002 DSP Laboratory Spring 2003

ECEN4002 Spring 2003Filter Implementation R. C. Maher2 Digital Filters DSP ALUs designed to do fast MACs Use Harvard architecture: place filter state in X memory, filter coefficients in Y memory Try to avoid truncation until after all MACs

ECEN4002 Spring 2003Filter Implementation R. C. Maher3 FIR Filter Review Z -1 + h0h0 h1h1 h2h2 h3h3 x[n] x[n-1] y[n] x[n-2] x[n-3]

ECEN4002 Spring 2003Filter Implementation R. C. Maher4 FIR Setup Modulo N Buffer Memory Filter state (delay line) X Memory Modulo N Buffer Memory Coefficients (delay line) Y Memory Input OutputAccumulator

ECEN4002 Spring 2003Filter Implementation R. C. Maher5 FIR Code for Filter order ‘n’ Input and Output in accumulator ‘a’ r0: samples, r4: coefs, m0 & m4: n-1 movea,x(r0) clrax:(r0)+,x0y:(r4)+,y0 rep#n-1 macx0,y0,ax:(r0)+,x0y:(r4)+,y0 macrx0,y0,a(r0)-

ECEN4002 Spring 2003Filter Implementation R. C. Maher6 IIR Filters IIR (infinite impulse response) filters allow zeros and poles; FIR allow zeros only. IIR can be more selective for a given filter order IIR also called recursive filters: output depends on past inputs and past outputs IIR designs are not guaranteed to be stable IIR filters can be particularly sensitive to coefficient quantization

ECEN4002 Spring 2003Filter Implementation R. C. Maher7 IIR Issues: Stability and Sensitivity Finite precision of coefficients can lead to several issues: –In order to be unconditionally stable and causal, all system poles must be inside the unit circle (|z|<1). Coefficient roundoff may inadvertently move a pole outside unit circle –Finite coefficient precision “quantizes” pole locations: may change frequency response from ideal case even if still stable

ECEN4002 Spring 2003Filter Implementation R. C. Maher8 Overflow Issues Gain from input to storage nodes in the filter may exceed unity. This can cause filter state to be saturated (clipped), resulting in distortion Typically must scale down (attenuate) the input signal, then scale up (amplify) by an equal amount on the output

ECEN4002 Spring 2003Filter Implementation R. C. Maher9 Second-Order Sections High-order filter polynomials involve terms that are products and sums involving many poles and zeros. Small roundoff errors when implementing filter can lead to large response errors As with analog filters, it is typical to reduce sensitivity by using second-order sections

ECEN4002 Spring 2003Filter Implementation R. C. Maher10 Implementing 2 nd Order Sections 2 nd Order (bi-quad) expression Numerator implements 2 zeros, denominator implements 2 poles (real or complex conj.)

ECEN4002 Spring 2003Filter Implementation R. C. Maher11 Direct Form Bi-Quad Z -1 + b0b0 b1b1 b2b2 x[n] x[n-1] y[n] x[n-2] Z -1 -a 1 -a 2 y[n-1] y[n-2]

ECEN4002 Spring 2003Filter Implementation R. C. Maher12 IIR Code for Direct Form II, with equations: w(n)=x(n)-a i1 w(n-1)-a i2 w(n-2) y(n)=w(n)+b i1 w(n-1)+b i2 w(n-2) Since a i1 and b i1 may be > 1, need to divide all coefs by 2, then use special scaling mode for  2 on read from accumulator: ori#$08,MR  sets “scale up”: 1-bit left shift on acc read

ECEN4002 Spring 2003Filter Implementation R. C. Maher13 IIR for (cont.) N = number of second-order sections Filter state (w) in X memory: r0 Filter coefs (a,b) in Y memory: r4 –Coefs stored in order: a 12 /2, a 11 /2, b 12 /2, b 11 /2, a 22 /2, … b N2 /2 –State (data) stored in order: w 1 (n-2), w 1 (n-1), w 2 (n-2), w 2 (n-1), … w N (n-1) m0 = 2*N-1, m4 = 4*N-1 Initial gain in y1, input in y0, output in ‘a’

ECEN4002 Spring 2003Filter Implementation R. C. Maher14 IIR for (cont.) mpyy0,y1,ax:(r0)+,x0y:(r4)+,y0 do#N,end_cell mac-x0,y0,ax:(r0)-,x1y:(r4)+,y0 macr -x1,y0,ax1,x:(r0)+y:(r4)+,y0 macx0,y0,aa,x:(r0)+y:(r4)+,y0 macx1,y0,ax:(r0)+,x0y:(r4)+,y0 end_cell rnd a

ECEN4002 Spring 2003Filter Implementation R. C. Maher15 Other Filter Structures Direct Form I and Direct Form II Cascade and Parallel Realizations Transpose Forms Lattice Forms

ECEN4002 Spring 2003Filter Implementation R. C. Maher16 EVM Note: External Memory To use external memory on EVM, need to program the bus control register and the address attribute register 0 (see Family Manual) movep #$040821,x:M_AAR0;Compare 8 most significant bits ;Look for a match with address ;Y: xxxx xxxx xxxx xxxx ;No pack, no mux, Y enabled ;P and X disabled ;AAR0 pin active low movep #$012421,x:M_BCR ;One ext. wait state Access to external memory is slower than internal memory: wait state stalls processor

ECEN4002 Spring 2003Filter Implementation R. C. Maher17 Conclusion DSP chips (including the DSP563xx) are designed specifically for fast digital filter implementations Care must be taken to ensure that the practical details are addressed: –Coefficient quantization –Overflow and scaling –Computational complexity