Coordinate Based Tracking System Group: OX

Overview

Current Status of Project CDR: Main Board Schematics Obtain Main board parts Motor board schematics Assemble microcontroller board Get processor running

Schematics Microcontroller Power Circuit Reset Circuit Microcontroller Circuit Memory

Microcontroller Power Circuit

Reset Circuit

Micrcontroller Circuit

Memory

RS232 Interfaces

Test Program for HC11

Software Flow Sources interrupting Microcontroller On board serial port Off board UART Nintendo Controller The on board serial port will be interrupted by our monitor program, and will be used to execute programs The Nintendo Controller will be used for controlling the software flow.

Software Flow Cont.

External Instructions These external instructions will be received and sent using an off-board UART using RS-232.

User Movement

Preloaded Sequences Sequences making the motors direct in various shapes such as squares, triangles, ellipses will be generated from the processor and sent to the motor controllers.

Polling the Motor Controllers The motor control IC’s will have to be polled to determine if the motor has reached desired location This will best be implemented by sending the motor X and Y coordinates and waiting for idle state. This will take the major bandwidth of the system.

Xilinx XCS10

FPGA Progress Memory Map Logic NES Controller Logic

Memory Map 32 Kbytes EPROM 32 Kbytes RAM 10 bytes Peripherals LCD Motor[X] Motor[Y] NES Controller UART ISR Pointer

Memory Map Logic

Interrupt Service Routine (ISR) Pointer Problem: Several Devices need external interrupt Only one non-maskable external pin in HC11 Solution: Implement ISR Pointer in FPGA Pointer Register in Memory map Read pointer as it was memory from the FPGA

Peripheral Timing NES needs special signals to provide push button mechanism Enable (E) on LCD needs to pulse after LCD address has been put on the Bus.

NES Controller Needs special signals provided by FPGA logic Will be memory mapped to address 0005H Can be read as normal memory

NES Controller Timing Diagram

NES Controller Logic Logic to Create Pulse and Latch Signals

NES Controller Logic Cont. Logic to read in data from NES Controller

Overall Logic

The HCTL1000 Why are we using it? Made for the job Varying control options Closed Feedback loop Easily Programmed

Schematic for HCTL1000

HCTL Block Diagram

Using the HCTL Setup Registers Send Commutator positions (1 reg) Commutator (5 reg) Control Mode (1 reg) Send Commutator positions (1 reg) Feedback makes sure its in position

The Commutator Four phase output Programmable for Half step Reduced to two phase output Programmable for Half step Run phases with different offset Steps with PWM Pulse time and width programmable for varying mode operation

The Schematic (again)

Feedback and the Filter Digital feedback for filter control Accepts distance change, filters PWM 3 Registers for filter parameters Gain, Pole, and Zero Used in position control mode

HEDM5605 #J06 The Feedback for the HCTL1000 1024 Counts per rotation Much higher than required specifications Dual phase output Set register on HCTL to read properly

Allegro: 3964 Dual Full-Bridge PWM Motor Driver

How an H-Bridge works: Forward mode, switches A and D closed. Reverse mode, switches B and C closed. * H-Bridge is the mechanical equivalent of a DPDT Switch.

Functional Block Diagram

Motor Control with 3964

A Mount for Stepper Motors

Added Components

Our Mount for Stepper Motors

Objective Timeline CDR: Main Board Schematics Obtain Main board parts Motor board schematics Assemble microcontroller board Get processor running Milestone 1:  Obtain Motor Board Assemble Motor board Finish and test microcontroller hardware Implement Game Pad interface

Objective Timeline (Cont) Milestone 2: Monitor program running Implement interface with motors Real Time Embedded system PC104+ module   Expo: Run Demo modes for the laser Receive XY and control laser Calibrate stepper motors for tracking

Timeline