MSE-630 Dopant Diffusion Topics: Doping methods Resistivity and Resistivity/square Dopant Diffusion Calculations -Gaussian solutions -Error function solutions.

Slides:



Advertisements
Similar presentations
6.1 Transistor Operation 6.2 The Junction FET
Advertisements

Chapter 7 Dopant Diffusion
FABRICATION PROCESSES
ECE/ChE 4752: Microelectronics Processing Laboratory
CHAPTER 8: THERMAL PROCESS (continued). Diffusion Process The process of materials move from high concentration regions to low concentration regions,
Fick’s Laws Combining the continuity equation with the first law, we obtain Fick’s second law:
1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.
Microelectronics Processing
CHE/ME 109 Heat Transfer in Electronics LECTURE 10 – SPECIFIC TRANSIENT CONDUCTION MODELS.
For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN © 2002.
Microelectronics Processing
Section 4: Diffusion part 2
ECE/ChE 4752: Microelectronics Processing Laboratory
Thin Film Deposition Prof. Dr. Ir. Djoko Hartanto MSc
ECE/ChE 4752: Microelectronics Processing Laboratory
M.H.Nemati Sabanci University
Chapter 8 Ion Implantation Instructor: Prof. Masoud Agah
ECE/ChE 4752: Microelectronics Processing Laboratory
Ion Implantation Topics: Deposition methods Implant
Section 6: Ion Implantation
Summer School for Integrated Computational Materials Education 2015 Kinetics Module Review Katsuyo Thornton, 1 Edwin Garcia, 2 Larry Aagesen, 1 Mark Asta.
Surface Modification for Biomaterials Applications
반도체 제작 공정 재료공정실험실 동아대학교 신소재공학과 손 광 석 隨處作主立處開眞
Chapter 7: DOPANT DIFFUSION
Thin Films and Diffusion. Diffusion is not constant across cross section, and continues with every subsequent high-temperature step; hence, we use.
PVD AND CVD PROCESS Muhammed Labeeb.
Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. ECE 255: Electronic Analysis and Design Prof. Peide (Peter)
Semiconductor Equilibrium
LW4 Lecture Week 4-1 Heterojunctions Fabrication and characterization of p-n junctions 1.
Gas-to Solid Processing surface Heat Treating Carburizing is a surface heat treating process in which the carbon content of the surface of.
SEMINAR ON IC FABRICATION MD.ASLAM ADM NO:05-125,ETC/2008.
Wafer Fabrication. CZ processing Ingot diameter varies inversely with pull rate: L = latent heat of fusion N = density  = Stephan-Boltzman constant.
Post Anneal Solid State Regrowth
Ch 140 Lecture Notes #13 Prepared by David Gleason
Elemental silicon is melted and grown into a single crystal ingot Single crystal ingot being grown Completed silicon ingot.
Dopant Diffusion Scaling down MOSFET by 1/K calls for smaller junction depths. high deposit activation (n  N d )  Resistance  in S/D. N d (x j ) = N.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #3. Diffusion  Introduction  Diffusion Process  Diffusion Mechanisms  Why Diffusion?  Diffusion Technology.
Solid State Electronic Devices Ch. 5. Junctions Prof. Yun-Heub Song.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #4. Ion Implantation  Introduction  Ion Implantation Process  Advantages Compared to Diffusion  Disadvantages.
Thermal doping review example This presentation is partially animated. Only use the control panel at the bottom of screen to review what you have seen.
Introduction EE1411 Manufacturing Process. EE1412 What is a Semiconductor? Low resistivity => “conductor” High resistivity => “insulator” Intermediate.
IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot.
Junction Formation The position of the junction for a limited source diffused impurity in a constant background is given by The position of the junction.
1 CHAPTER 7 Structure and Properties of Materials Defects and Properties : Point Defects and Diffusion.
Doping: Depositing impurities into Si in a controlled manner
Solution 2.5 Problem text: Rapid Thermal Annealing.(see chapt 6) has gained interest. The process allows wafers wafers that have a high concentration.
Lecture 9.0 Silicon Oxidation/Diffusion/Implantation.
Dean P. Neikirk © 1999, last update February 4, Dept. of ECE, Univ. of Texas at Austin Ion Implantation alternative to diffusion for the introduction.
Thin Film Deposition. Types of Thin Films Used in Semiconductor Processing Thermal Oxides Dielectric Layers Epitaxial Layers Polycrystalline Silicon Metal.
2-D Nanostructure Synthesis (Making THIN FILMS!)
Research Paper. Chapter 7: DOPANT DIFFUSION DOPANT DIFFUSION Introduction Introduction Basic Concepts Basic Concepts –Dopant solid solubility –Macroscopic.
© 2004 Dieter Ast, Edwin Kan This material has been edited for class presentation. Ion Implantation: The most controlled way to introduce dopants into.
Section 5: Thin Film Deposition part 1 : sputtering and evaporation
Issued: May 5, 2010 Due: May 12, 2010 (at the start of class) Suggested reading: Kasap, Chapter 5, Sections Problems: Stanford University MatSci.
Diffusion1 Dopant Diffusion (Jaeger Chapter 4 and Campbell Chapter 3) As indicated previously the main front-end processing in building a device or integrated.
Doping. 고려대학교 Center for MNB Sensor Technology 166.
Diffusion ‏ This animation illustrates the process of diffusion in which particles move from a region of higher concentration to a region of lower concentration.
Solid State Devices EE 3311 SMU
서강대학교 기계공학과 최범규(Choi, Bumkyoo)
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
Recall-Lecture 3 Atomic structure of Group IV materials particularly on Silicon Intrinsic carrier concentration, ni.
Chapter 8 Ion Implantation
Example Design a B diffusion for a CMOS tub such that s=900/sq, xj=3m, and CB=11015/cc First, we calculate the average conductivity We cannot calculate.
Section 7: Diffusion Jaeger Chapter 4 EE143 – Ali Javey.
1.6 Magnetron Sputtering Perpendicular Electric Magnetic Fields.
Chapter 7: DOPANT DIFFUSION
Rate Process and Diffusion
Semiconductor Physics
Presentation transcript:

MSE-630 Dopant Diffusion Topics: Doping methods Resistivity and Resistivity/square Dopant Diffusion Calculations -Gaussian solutions -Error function solutions

MSE-630 As devices shrink, controlling diffusion profiles with processing and annealing is critical in acquiring features down to nm Schematic of a MOS device cross section, showing various resistances. X j is the junction depth in the table above As devices shrink, controlling the depth of the gate channel becomes critical

MSE-630 Deposition Methods Chemical Vapor Deposition Evaporation -Physical Vapor Deposition -Sputtering Ion Beam Implantation

MSE-630 Vapor Deposition: Chemical (CVD) In Chemical Vapor Deposition (CVD) a reactive gas is passed over the substrate to be coated, inside of a heated, environmentally controlled reaction chamber. In this case (right) CH4 gas is introduced to create a diamond-like coating

MSE-630 Vapor Deposition: Physical (PVD) Physical Vapor Deposition (PVD) may be from evaporation or sputtering. Sometimes a plasma is used to create high energy species that collide with target (right)

MSE-630 Sputtering

MSE-630 Ion beam implantation gives excellent control over the predeposition dose and is the most widely used doping method

MSE-630 Ion beam implantation It can cause surface damage in the form of sputtering of surface atoms, surface roughness and changes in the crystal structure. Though these defects can be removed by annealing, annealing also results in a high degree of dopant diffusion.

MSE-630

Resistivity and Sheet Resistance From Ohm’s Law:  J =  Where J = current density (A/cm 2 )  = electric field strength (V/m)  =resistivity (  cm) Thus  =  /J In semiconductors, the doped regions have higher conductivity than the sheet as a whole. We are interested in the depth of the junction, x j. The resistance we measure is that of a square of any dimension with depth x j, or R =  /x j  /square ≡  s for uniform doping. For variable doping:

MSE-630

Solid solubility Sometimes dopants cluster around vacancies and other point defects, as above, becoming electrically neutral. As a result, effective level of doping may be lower than equilibrium values in the adjacent figure

MSE-630 Diffusion Models Fick’s 1 st law: F = -D dC/dx Fick’s 2nd law:  C/  t =  F/  x = (F in – F out )/  x dC/dt = D d 2 C/dx 2

MSE-630 Diffusion in Silicon In general, diffusivity is given by: D = D o exp(-E a /kT) Where E a = activation energy ~ 3.5 – 4.5 eV/atom k = 8.61x10 -5 eV/atom-K This applies to intrinsic conditions. Dopant levels (N D, N A ) need to be less than the intrinsic carrier density, n i as shown in the graph

MSE-630

Gaussian Solution in an Infinite Medium

MSE-630

Gaussian Diffusion near a Surface

MSE-630 Error-Function solution in an Infinite Medium

MSE-630 Error-Function solution near a Surface This solution assumes the concentration C is at the solid solubility limit and is infinite The dose, Q, is calculated by summing the concentration:

MSE-630

Effect of successive diffusion steps If diffusion occurs at constant temperature, where the diffusivity is constant, then the effective thermal budget, Dt is: (Dt) eff = D 1 t 1 +D 1 t 2 +…D 1 t n If D is not constant, then time is increased by the ratio of D 2 /D 1, or (Dt) eff = D 1 t 1 +D 1 t 2 (D 2 /D 1 )+…D 1 t n (D n /D 1 )

MSE-630