Chess Review October 4, 2006 Alexandria, VA Edited and presented by Impact: Fault Tolerance and High Confidence Embedded Systems Design Gabor Karsai Vanderbilt.

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Presentation transcript:

Chess Review October 4, 2006 Alexandria, VA Edited and presented by Impact: Fault Tolerance and High Confidence Embedded Systems Design Gabor Karsai Vanderbilt University, ISIS

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai2 Center impact (1): New Start Research Project Multi-University Research Initiative: –Frameworks and Tools for High-Confidence Design of Adaptive, Distributed Embedded Control Systems –Participants: Berkeley, CMU, Stanford, VU Objectives: – Development of a theory of deep composition of hybrid control systems with attributes of computational and communication platforms – Development of foundations for model-based software design for high-confidence, networked embedded systems applications. – Support of high-level reusability of tools in domain- specific tool chains Web:

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai3 Embedded Control System Design Flow Requirement Specification Control Design HW Arch. Design System Arch. Design Component Design Software Architecture SW Deployment

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai4 Design Flow: Tools and Analysis RA FD CD HwA SY DPL Functional Mod/Sim Arch Mod/Sim Alloc./Sched. Analysis HW Pwr/ Perf Est Latency/RT Analysis SwA Requirement Specification Control Design Component Design Software Architecture HW Arch. Design System Arch. Design Code Gen. Verif. SW Deployment EVIDENCE

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai5 Overall Undertaking Development of component technologies in all areas (theory/design/tools) Incrementally building a tool chain for a selected domain (UAV flight and mission control) Demonstration of control software development with the tool chain Experiments

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai6 Control Design – A DSML View Simulink/StateFlow (DSML SL/SF ) Requirements Requirements – Functional Design Mapping (DSML SL/SF ) SL/SF Requirements - Functional Design Mapping Requirement Specification Objective: Define the control laws to meet requirements Platform: SL/SF-like modeling language, (Ptolemy 2; GME) Tools: SL/SF Model Builder+Simulator (Ptolemy 2)

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai7 Control Design: Approaches Plant Model Controller Design Mathematical model of the Plant Design of a lin. or non-lin. controller satisfying stability/performance requirements Simulations/refinement Robust Control Design Uncertain dynamics, unknown non-linearities Fault effects, sensing errors Fault adaptive control Robust analysis, (SDP, LMI), Simulations Comp/Comm Platform Model Embedded Systems Modeling and Deep Compositionality Hierarchies of Robust Hybrid and Embedded Systems Verification and Validation of Conservative Approximations Adaptive Control Architectures for Uncertainty Handling Quantization, finite word length, round-off errors Modality Limited resources, resource sharing Concurrency models, scheduling Limited communication bandwidth, networking Goal: Design controller behavior satisfying all requirements

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai8 Addition to the Design Flow SW Deployment RA FD CD HwA SY DPL Functional Mod/Sim Arch Mod/Sim Alloc./Sched. Analysis HW Pwr/ Perf Est Latency/RT Analysis SwA Requirement Specification Control Design Component Design Software Architecture HW Arch. Design System Arch. Design Code Gen. Verif.

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai9 SW Architecture Design Simulink/StateFlow (DSML SL/SF ) Component Model SW Architecture Model (DSML SL/SF,CM ) SL/SF Functional Architecture – SW Architecture Mapping Objective: Optimize the SW architecture by selecting a component model and by allocating functions to components. Platform: MoC-s Tools: GME, GReAT, DESERT, Ptolemy-2,… SwA

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai10 Model Translators Analysis Models - Simulators Software Architecture Verification Goal: design software architecture using well understood composition platforms that allow verification of properties using analysis or “correct-by-construction” property guarantees. Control/Functional Architecture Software Architecture Synthesis Tools Model Translators Analysis Models - Simulators Generator Metamodeling Meta Generator Component Models (MoC) Semantic Anchoring Safe Composition Platform Embedded Software Composition Platforms Heterogeneous MoC-s Actor Models Ptolemy-II based runtime support Formally specified semantics Compositional semantics for heterogeneous systems

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai11 Addition to the Design Flow SW Deployment RA FD CD HwA SY DPL Functional Mod/Sim Arch Mod/Sim Alloc./Sched. Analysis HW Pwr/ Perf Est Latency/RT Analysis SwA Requirement Specification Control Design Component Design Software Architecture HW Arch. Design System Arch. Design Code Gen. Verif.

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai12 SW Component Design Simulink/StateFlow (DSML SL/SF ) Component Implementation Lng. SW Components SL/SF Functional blocks – SW Component Mapping Objective: Design and implement SW for components satisfying behavior defined by control laws. Platform: Component Implementation Languages (Java, C++, Other..) Tools: Generators (RT-Workshop; GReAT), Compilers, WCET Analyzers CM

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai13 Software Component Verification Goal: prove that the component software behaves as intended under all foreseeable operating conditions. Model refinement Model verification Model compilation or hand coding Static analysis Test-based verification Component Behavior Model Component Implementation Metamodeling DS Generator Metamodeling Generator Metamodeling Meta Generator Semantic Anchoring Model Integrated Computing Metamodeling Model-based code generation Meta-model-based tesing of code generators Automated Source Code Verification and Testing Model-based test generation Advanced static analysis Code Analysis

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai14 System Configuration Design HW Architecture (DSML HW ) RTOS Model (DSML RTOS ) System Model (DSML SYSTEM ) System Modeling: HW-Comm-RTOS mapping Objective: Design System configuration that meets cost/reliability/power requirements. Platform: Comm-links; RTOS, Comp. Middleware Tools: GME, RTOS, Comp. Middleware tools RTOS HwA

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai15 SW Deployment SW Architecture (DSML SL/SF,CM ) System Model SW Deployment Model (DSML SL/SF,CM ) SW Deployment: SW Components – System Mapping Objective: Optimize System architecture by allocating SW components to RTOS Tasks and Communication Channels. Platform: Composition Model Tools: GME, DESERT, Timing Analysis,… System Model Arch. Model

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai16 Approach & Technical Challenges Guaranteed behavior of distributed control software using the following approaches: (1) extension of robust controller design to selected implementation error categories (2) providing “certificate of correctness” for the controller implementation (3) development of semantic foundation for tool chain composition (4) introducing safe computation models that provide behavior guarantees

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai17 Expected Deliverables Composable tool architecture –New generation of Open Tool Integration Framework –Prototype Tool Chain Testing and Experimental Validation –Software fully built and validated by tools Avionics for small UAVs Mission Management COP for C2

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai18 Computing Platforms: Design/Verification Tools, Embedded Devices

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai19 Transition Approach Tools are disseminated through the ESCHER Repository (Open Source) Government: AFRL connections –AFRL/IF, AFRL/VACC, AFRL/VACA, AFRL/CSD CerTA Project (Boeing/UCB) Future Combat Systems Program (Boeing/VU)

ITR Review, Oct. 4, 2006"Impact: HCDES/MICTES", Karsai20 Center Impact (2): Collaborative Research with NASA/ARC Model-Integrated Computing Tools for Exploration Systems (MICTES) Goal: Assured Development of Flight Control Software for Spacecraft Applications Front-end Modeling: Simulink/Stateflow Code generation using a GReAT- based model transformation tool CG output includes annotated code (verification conditions) Model checker/theorem prover is used to prove code properties (ARC) Expected result: Integrated code generator/code verifier tool for Simulink/Stateflow-based Embedded Software Development