Coincidence Detector Coincidence Detector Spring Semester 2006 Characterization Presentation Presenting: Roee Bar & Gabi Klein Instructor:Ina Rivkin Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab

Sunday, April 09, 2006Characterization Presentation Motivation In computers network: a collision between two signals. In computers network: a collision between two signals. In physics: detecting two particles hit two detectors to measure radiation decay. In physics: detecting two particles hit two detectors to measure radiation decay. While planning and testing multiprocessor systems, there is a need to check whether the systems are working simultaneously. While planning and testing multiprocessor systems, there is a need to check whether the systems are working simultaneously.

Sunday, April 09, 2006Characterization Presentation Goals Additional Goals: Create an event generator, which will be used to test the detector. Create an event generator, which will be used to test the detector. Thoroughly understand and document the features and capabilities of the Digital Clock Manager (DCM) on the Virtex II Pro. Thoroughly understand and document the features and capabilities of the Digital Clock Manager (DCM) on the Virtex II Pro. Main Goal: Detect two simultaneous events

Sunday, April 09, 2006Characterization Presentation Background In an ideal world, we can detect two events occurring at the same time. In an ideal world, we can detect two events occurring at the same time. In reality, the probability of the two events occurring exactly at the same time is practically zero. In reality, the probability of the two events occurring exactly at the same time is practically zero.

Sunday, April 09, 2006Characterization Presentation Background Therefore, we have to define a timeframe T. Therefore, we have to define a timeframe T. Two events occurring in this timeframe, are called coincident events. Two events occurring in this timeframe, are called coincident events. T

Sunday, April 09, 2006Characterization Presentation Equipment Used Xilinx Development board, model XUPV2P, will be used for the project implementation.

Sunday, April 09, 2006Characterization Presentation Implementation Coincidence Detector Virtex II Pro Architecture Schematic Event Generator Configuration Registers: 1bit – Reset 1bit – Detector Enabled 1bit – Mode: Interrupt / Polling Nbits – Timeframe setting 1bit – Coincidence Detected SigB SigA

Sunday, April 09, 2006Characterization Presentation Implementation The detector and the generator will be implemented as a soft core on the Virtex II Pro platform, using the Xilinx XUPV2P Development Board. The detector and the generator will be implemented as a soft core on the Virtex II Pro platform, using the Xilinx XUPV2P Development Board. The core will detect a coincidence of two events in a given timeframe. The core will detect a coincidence of two events in a given timeframe.

Sunday, April 09, 2006Characterization Presentation Schedule 3 weeks ( ) – Knowledge ramp up: 3 weeks ( ) – Knowledge ramp up: EDK EDK VHDL VHDL DCM – in-depth study. DCM – in-depth study. 3 weeks ( ) – Event generator implementation 3 weeks ( ) – Event generator implementation 3 weeks ( ) – Detector implementation 3 weeks ( ) – Detector implementation 4 weeks ( ) – Project verification and finalizing documentation 4 weeks ( ) – Project verification and finalizing documentation