Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 61 Today’s class Floating point numbers Computer systems organization

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 62 Principles of Floating Point Must separate range from precision Use scientific notation n = f × 10 e  f is the fraction or mantissa  e is the exponent (a positive or negative integer) Examples 3.14 = × 10 1 = 3.14 × = 0.1 × 10 −5 = 1.0 × 10 − = × 10 4 = × 10 3

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 63 Seven Regions of Real Number Line Large negative numbers less than −0.999 × Negative numbers between −0.999 × and −0.100 × 10 −99 Small negative numbers, magnitudes less than × 10 −99 Zero Small positive numbers, magnitudes less than × 10 −99 Positive numbers between × 10 −99 and × Large positive numbers greater than × 10 99

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 64 Seven Regions of Real Number Line

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 65 Approximate Bounds of Expressible Floating-Point Numbers (Unnormalized)

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 66 Normalized numbers Examples of normalized floating-point numbers.

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 67 IEEE Floating-Point Standard 754 IEEE floating-point formats. (a) Single precision. (b) Double precision.

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 68 IEEE Floating-point Standard 754 Characteristics of IEEE floating-point numbers.

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 69 IEEE Numerical Types

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 610 In-Class Exercise Convert the following numbers to IEEE single- precision format. Give the results as 8 hexadecimal digits.  9.0  Convert the following IEEE single-precision floating-point numbers from hex to decimal:  42E48000  3F880000

Computer Systems Organization

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 612 Organization of a simple computer

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 613 CPU Organization

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 614 Instructions Register-memory  Allow memory words to be fetched into registers  Allow registers to be stored to memory words Register-register  Fetches two operands from the registers  Brings them to the ALU input registers  Performs some operation on them  Stores the result back in one of the registers

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 615 Instruction Execution Steps Fetch next instruction from memory into instruction register Change program counter to point to next instruction Determine type of instruction just fetched If instruction uses a word in memory, determine where it is Fetch word, if needed, into CPU register Execute the instruction Go to step 1 to begin executing the following instruction

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 616 Design Principles for Modern Computers All instructions are directly executed by hardware Maximize the rate at which instructions are issued Instructions should be easy to decode Only loads and stores should reference memory Provide plenty of registers

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 617 Instruction-Level Parallelism

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 618 Pipelining effect Suppose the cycle time of the machine is 2 ns For the 5-stage pipeline shown in the previous slide, it takes 10 ns for an instruction to completely execute It appears this machine can run at 100 MIPS However, it’s much better than this At every clock cycle, starting with the 5 th, one instruction completes execution This gives an actual processing rate of 500 MIPS

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 619 Dual Pipelines If one pipeline is good, two must be better!

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 620 Superscalar Architecture

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 621 Processor-Level Parallelism

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 622 Multiprocessors A single-bus multiprocessor A multicomputer with local memories

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 623 Memory Most basic unit of memory is the bit, a 0 or 1 (binary digit) Smallest addressable unit of memory in a computer is the byte (containing 8 bits) Words are groups of bytes, typically 4 bytes (32 bits) to a word

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 624 Big- and Little-Endian Bytes can be numbered left-to-right or right-to left

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 625 Byte Ordering

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 626 Parity Memories can have occasional errors Errors will be bit inversions Can detect one-bit errors by adding an extra bit called a parity bit This bit is set or cleared so that the total number of 1’s in the word is either even or odd, depending on which type of parity is being used

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 627 Codewords Let one memory word consist of m data bits Let’s add r redundant (or check or parity) bits Total length is n bits, where n = m + r The n-bit unit is called a codeword Given two codewords you can determine how many bits differ by computing the exclusive or (XOR) of the two codewords and counting how many 1s are in the result This sum is called the Hamming distance

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 628 How Many Check Bits? There are 2 m valid memory words Each valid memory word has n illegal codewords 1 bit away from it Thus, each of the 2 m valid words needs n+1 bit patterns dedicated to it Total number of bit patterns is 2 n So, (n+1)2 m ≤ 2 n, or (m+r+1) ≤ 2 r

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 629 Number of check bits for a code that can correct a single error

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 630 Error Correcting Codes (a) Encoding of 1100 (b) Even parity added (c) Error in AC

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 631 Hamming Codes 16-bit word needs 5 parity bits The parity bits are the bits whose positions are powers of 2 Bit b is checked by the parity bits whose positions sum to b  For example, bit 6 is checked by bits 2 and 4

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 632 Cache Memory

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 633 Memory Hierarchy

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 634 Magnetic Disk Format

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 635 Disk Platters

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 636 Disk Performance First, arm must be moved to the correct track; this is called a seek Average seek times between random tracks are in the range 5-10 ms Then we have the rotational delay to find the correct sector Average rotational delay is 3-6 ms Transfer time depends on the linear density and rotation speed Typical transfer times for one sector are μs Clearly seek time and rotational delay dominate the transfer time

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 637 Zones Outer tracks of a disk have larger circumferences than inner tracks Thus linear density is lower the further out you go To increase capacity the disk is divided into zones (there are 5 zones to the right) The number of sectors per track is increased as you move from zone to zone going outward

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 638 CD-ROM

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 639 CD-ROM Logical Data Layout

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 640 DVD Smaller pits than CD (0.4 microns vs. 0.8 microns for CD) Tighter spiral (0.74 microns vs. 1.6 microns for CD) Capacity is 4.7 GB

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 641 Input/Output

Informationsteknologi Friday, October 19, 2007Computer Architecture I - Class 642 Buses