Topics Combinational logic functions.

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Presentation transcript:

Topics Combinational logic functions. Static complementary logic gate structures. Switch logic. Non-standard gate structures.

Combinational logic expressions Combinational logic: function value is a combination of function arguments. A logic gate implements a particular logic function. Both specification (logic equations) and implementation (logic gate networks) are written in Boolean logic.

Gate design Why designing gates for logic functions is non-trivial: may not have logic gates in the libray for all logic expressions; a logic expression may map into gates that consume a lot of area, delay, or power.

Boolean algebra terminology Function: f = a’b + ab’ a is a variable; a and a’ are literals. ab’ is a term. A function is irredundant if no literal can be removed without changing its truth value.

Completeness A set of functions f1, f2, ... is complete iff every Boolean function can be generated by a combination of the functions. NAND is a complete set; NOR is a complete set; {AND, OR} is not complete. Transmission gates are not complete. If your set of logic gates is not complete, you can’t design arbitrary logic.

Static complementary gates Complementary: have complementary pullup (p-type) and pulldown (n-type) networks. Static: do not rely on stored charge. Simple, effective, reliable; hence ubiquitous.

Static complementary gate structure Pullup and pulldown networks: VDD pullup network out inputs pulldown network VSS

Inverter + out a

NAND gate + out b a

NOR gate + b a out

AOI/OAI gates AOI = and/or/invert; OAI = or/and/invert. Implement larger functions. Pullup and pulldown networks are compact: smaller area, higher speed than NAND/NOR network equivalents. AOI312: and 3 inputs, and 1 input (dummy), and 2 inputs; or together these terms; then invert.

AOI/OAI gates

Construction of an AOI Gate out = [ab+c]’: invert symbol circuit or and

Construction of another AOI Gate

Pullup/pulldown network design Pullup and pulldown networks are duals. To design one gate, first design one network, then compute dual to get other network. Example: design network which pulls down when output should be 0, then find dual to get pullup network.

Dual Network Construction

Switch logic Can implement Boolean formulas as networks of switches. Can build switches from MOS transistors—transmission gates. Transmission gates do not amplify but have smaller layouts.

Switch logic network a b out X 1 a b 1

Another switch logic network b out X 1 r s a r b s

Switch-based mux

Types of switches

Behavior of n-type switch n-type switch has source-drain voltage drop when conducting: conducts logic 0 perfectly; introduces threshold drop into logic 1. VDD VDD - Vt VDD

n-type switch driving static logic Switch underdrives static gate, but gate restores logic levels. VDD VDD - Vt VDD

n-type switch driving switch logic Voltage drop causes next stage to be turned on weakly. VDD VDD - Vt VDD

Behavior of complementary switch Complementary switch products full-supply voltages for both logic 0 and logic 1: n-type transistor conducts logic 0; p-type transistor conducts logic 1.

Charge Sharing Problem Values are stored at parasitic capacitances on wires:

Charge Sharing Problem

Charge Sharing Example 1 1 1 1

Application of Transmission Gate

Application of Transmission Gate