Arithmetic I CPSC 321 Andreas Klappenecker

Administrative Issues Office hours of TA Praveen Bhojwani: M 1:00pm-3:00pm

Any Questions?

What happened so far? We learned the basics of the MIPS assembly language We briefly touched upon the translation to machine language We formulated our goal, namely the implementation of a MIPS processor.

Pipelined MIPS Processor

Welcome to the Future! The execution of machine instructions can follow, for example, the steps: Instruction fetch Instruction decode and register read Execute opn. or calculate an address Access operand in data memory Write the result into a register

Pipelined MIPS Processor We concentrate first on the arithmetic-logic unit

The Arithmetic-Logic Unit Arithmetic (addition and subtraction) we need to know number representations there exist various interesting algorithms for addition and subtraction integer and floating point arithmetic Logical operations (and, or, not)

Computer Arithmetic

Unsigned Numbers 32 bits are available Range = = Upper bound 2 32 –1 = 4,294,967,295

Unsigned Numbers If we have n bit unsigned integers, then addition really means a+b mod 2 n For example, if n=4, then = = 22 = 6 mod =0110 2

Number representations What signed integer number representations do you know?

Signed Numbers Sign-magnitude representation MSB represents sign, 31bits for magnitude One’s complement Use for non-negative range Invert all bits for negative numbers Two’s complement Same as one’s complement except negative numbers are obtained by inverting all bits and adding 1

One’s Complement Suppose we want to express -30 as an 8bit integer in one’s complement representation. 30 = Invert the bits to obtain the negative number: -30 =

Two’s Complement Suppose we want to express -30 as an 8bit integer in two’s complement representation. 30 = Invert the bits to obtain the negative number: Add one: -30 =

Advantages and Disadvantages sign-magnitude representation one’s complement representation two’s complement representation

Signed Numbers (3bits) sign magnitudeone’s complementtwo’s complement = = = = = = = = = = = = = = = = -1

Two’s complement The unsigned sum of an n-bit number and its negative yields? Example with 3 bits: = 2 n => negate(x) = 2 n -x Explain one’s complement

two = 0 ten two = +1 ten two = +2 ten two = +2,147,483,646 ten two = +2,147,483,647 ten two = –2,147,483,648 ten two = –2,147,483,647 ten two = –2,147,483,646 ten two = –3 ten two = –2 ten two = –1 ten MIPS 32bit signed numbers

Conversions How do you convert an n-bit number into a 2n-bit number? (Assume two’s complement representation)

Conversions Suppose that you have 3bit two’s complement number = -3 Convert into a 6bit two’s complement number = -3 Replicate most significant bit!

Comparisons What can go wrong if you accidentally compare unsigned with signed numbers?

Comparisons for [un]signed Register $s Register $s Compare registers (set less than) slt $t0, $s0, $s1true, since –1 < 1 sltu $t1, $s0, $s1 false, since >1

Just like in grade school (carry/borrow 1s) Two's complement operations are simple subtraction using addition of negative numbers 0111 = = Addition & Subtraction

MIPS instructions lb loads a byte and stores the sign- extended version in a word. lbu loads a byte and stores it in a word Which of these two is typically used to process characters?

Overflow means that the result is too large for a finite computer word. For instance, adding two n-bit numbers does not yield an n-bit number. Suppose we add two 3-bit numbers Overflow

No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Detecting Overflow

OperationOperand AOperand BOverflow if result A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

An exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address is saved for possible resumption Don't always want to detect overflow MIPS instructions: addu, addiu, subu note: addiu still sign-extends! Effects of Overflow

Building an Arithmetic Logic Unit

Logic Gates: AND a b c a b c

Logic Gates: OR a b c a b c

Let's build an ALU to support the andi and ori instructions Selection of operation 0 = and, 1 = or we'll just build a 1 bit ALU, and use 32 of them Possible Implementation (sum-of-products): b a operation result An ALU (arithmetic logic unit)

Selects one of the inputs to be the output, based on a control input Build (and/or) ALU using a MUX S C A B 0 1 The Multiplexor note: it is called a 2-input mux even though it has 3 inputs!

Not easy to decide the “best” way to build something Don't want too many inputs to a single gate for our purposes, ease of comprehension is important Don’t want to have to go through too many gates Let's look at a 1-bit ALU for addition: Different Implementations c out = a b + a c in + b c in sum = a xor b xor c in

Different Implementations How could we build a 1-bit ALU for add, and, and or? How could we build a 32-bit ALU?

Building a 32 bit ALU

Two's complement approach: just negate b and add. How do we negate? A solution: What about subtraction (a – b) ?