More on RDT Robert John Walters. RDT – a reprise A Graphically based formal modelling language Models represented as diagrams (not text) Communications.

Slides:



Advertisements
Similar presentations
CS 267: Automated Verification Lecture 8: Automata Theoretic Model Checking Instructor: Tevfik Bultan.
Advertisements

Lecture 3Dr. Verma1 COSC 6397 – Information Assurance Module M2 – Protocol Specification and Verification University of Houston Rakesh Verma Lecture 3.
CS 290C: Formal Models for Web Software Lecture 4: Implementing and Verifying Statecharts Specifications Using the Spin Model Checker Instructor: Tevfik.
Macro Processor.
1 Temporal Claims A temporal claim is defined in Promela by the syntax: never { … body … } never is a keyword, like proctype. The body is the same as for.
Algorithms and Problem Solving
Chapter 2- Visual Basic Schneider1 Chapter 2 Problem Solving.
Solutions to Review Questions. 4.1 Define object, class and instance. The UML Glossary gives these definitions: Object: an instance of a class. Class:
1 Spin Model Checker Samaneh Navabpour Electrical and Computer Engineering Department University of Waterloo SE-464 Summer 2011.
Spin Tutorial (some verification options). Assertion is always executable and has no other effect on the state of the system than to change the local.
©The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 4 th Ed Chapter Software Development Software Life Cycle UML Diagrams.
Model Checking. Used in studying behaviors of reactive systems Typically involves three steps: Create a finite state model (FSM) of the system design.
Visual Formal Methods R J Walters. Introduction Motivation The Language The tools An example Conclusion.
© 2005 Prentice Hall8-1 Stumpf and Teague Object-Oriented Systems Analysis and Design with UML.
Visual Modelling R J Walters. Introduction Motivation The Language The tools An example Conclusion.
CS 201 Functions Debzani Deb.
Implementing Hierarchical Features in a Graphically Based Formal Modelling Language Peter Henderson, Robert John Walters and Stephen Crouch Department.
Automating Checking of Models Built Using a Graphically Based Formal Language Robert John Walters.
Chapter 8: I/O Streams and Data Files. In this chapter, you will learn about: – I/O file stream objects and functions – Reading and writing character-based.
Copyright © Cengage Learning. All rights reserved.
Programming Logic and Design, Introductory, Fourth Edition1 Understanding Computer Components and Operations (continued) A program must be free of syntax.
1 Case Study: Starting the Student Registration System Chapter 3.
Chapter 2- Visual Basic Schneider1 Chapter 2 Problem Solving.
PRE-PROGRAMMING PHASE
Engineering H192 - Computer Programming The Ohio State University Gateway Engineering Education Coalition Lect 3P. 1Winter Quarter Structured Engineering.
TIBCO Designer TIBCO BusinessWorks is a scalable, extensible, and easy to use integration platform that allows you to develop, deploy, and run integration.
CCSA 221 Programming in C CHAPTER 2 SOME FUNDAMENTALS 1 ALHANOUF ALAMR.
02/06/05 “Investigating a Finite–State Machine Notation for Discrete–Event Systems” Nikolay Stoimenov.
Cheng/Dillon-Software Engineering: Formal Methods Model Checking.
Object Oriented Software Development
Visual Basic Chapter 1 Mr. Wangler.
Practical Object-Oriented Design with UML 2e Slide 1/1 ©The McGraw-Hill Companies, 2004 PRACTICAL OBJECT-ORIENTED DESIGN WITH UML 2e Chapter 2: Modelling.
Copyright © 2007 Pearson Education, Inc. Publishing as Pearson Addison-Wesley Extended Prelude to Programming Concepts & Design, 3/e by Stewart Venit and.
Extended Prelude to Programming Concepts & Design, 3/e by Stewart Venit and Elizabeth Drake Chapter 8: More About OOP and GUIs.
Simple Program Design Third Edition A Step-by-Step Approach
Introduction to Visual Basic. Quick Links Windows Application Programming Event-Driven Application Becoming familiar with VB Control Objects Saving and.
June 27, 2002 HornstrupCentret1 Using Compile-time Techniques to Generate and Visualize Invariants for Algorithm Explanation Thursday, 27 June :00-13:30.
Names Variables Type Checking Strong Typing Type Compatibility 1.
Chapter 6 Programming Languages (2) Introduction to CS 1 st Semester, 2015 Sanghyun Park.
1 Extend is a simulation tool to create models quickly, with all the blocks you need and without even having to type an equation. You can use a series.
Problem Solving Techniques. Compiler n Is a computer program whose purpose is to take a description of a desired program coded in a programming language.
Problem Solving using the Science of Computing MSE 2400 EaLiCaRA Spring 2015 Dr. Tom Way.
More on Hierarchies 1. When an object of a subclass is instantiated, is memory allocated for only the data members of the subclass or also for the members.
Chapter 1 Program design Objectives To describe the steps in the program development process To introduce the current program design methodology To introduce.
Flowcharts and Algorithms. Review of Terms  A computer is a machine that can represent and manipulate data –Ultimately the data and the instructions.
First Steps in Modularization. Simple Program Design, Fourth Edition Chapter 8 2 Objectives In this chapter you will be able to: Introduce modularization.
Copyright © 2007 Pearson Education, Inc. Publishing as Pearson Addison-Wesley Extended Prelude to Programming Concepts & Design, 3/e by Stewart Venit and.
1 Compiler Construction (CS-636) Muhammad Bilal Bashir UIIT, Rawalpindi.
Temporal Logic Model-checking with SPIN
Engineering H192 - Computer Programming Gateway Engineering Education Coalition Lect 3P. 1Winter Quarter Structured Engineering Problem Solving and Logic.
Class Builder Tutorial Presented By- Amit Singh & Sylendra Prasad.
May University of Glasgow Generalising Feature Interactions in Muffy Calder, Alice Miller Dept. of Computing Science University of Glasgow.
M1G Introduction to Programming 2 5. Completing the program.
© 2006 Pearson Addison-Wesley. All rights reserved 2-1 Chapter 2 Principles of Programming & Software Engineering.
Introduction to Object-Oriented Programming Lesson 2.
PowerPoint Presentation for Dennis & Haley Wixom, Systems Analysis and Design, 2 nd Edition Copyright 2003 © John Wiley & Sons, Inc. All rights reserved.
Lecture 4 Introduction to Promela. Promela and Spin Promela - process meta language G. Holzmann, Bell Labs (Lucent) C-like language + concurrency dyamic.
Software Systems Verification and Validation Laboratory Assignment 4 Model checking Assignment date: Lab 4 Delivery date: Lab 4, 5.
Copyright © 2007 Pearson Education, Inc. Publishing as Pearson Addison-Wesley Extended Prelude to Programming Concepts & Design, 3/e by Stewart Venit and.
Program Design. Simple Program Design, Fourth Edition Chapter 1 2 Objectives In this chapter you will be able to: Describe the steps in the program development.
INTRODUCTION TO COMPUTER PROGRAMMING(IT-303) Basics.
1 An SDL Tutorial Two primary elements: –Structure –Identifies the various components of the system, and the communication paths among them. –Components:
Cliquez pour modifier le style du titre Cliquez pour modifier les styles du texte du masque Deuxième niveau Troisième niveau Quatrième niveau Cinquième.
Arrays Chapter 7.
Visual Basic.NET Windows Programming
Chapter 8: More About OOP and GUIs
Formal verification in SPIN
This is where you can establish the name of the project and the address where it is stored - these are the defaults. If you do not enter anything, the.
Introduction to Algorithms and Programming
Lecture 20 – Practice Exercises 4
Presentation transcript:

More on RDT Robert John Walters

RDT – a reprise A Graphically based formal modelling language Models represented as diagrams (not text) Communications inspired by π-calculus Drawn in two parts: Behaviour of components (processes) How they are connected together

RDT Processes Inspired by RADs Have named state Three types of event: Send Receive Create *Processes describe a type of behaviour

RDT Models Process instances labelled with a name and their type Channels (names) known to an instance are shown and labelled Connections between channels shown by lines *Concerned with instances

Why target SPIN? Highly regarded and widely available Input language looks like “C” Direct input of property to be checked Natural correspondence between channels in Promela and RDT

Translation Several parts to the operation RDT processes converted to Promela processes RDT model conversion - the “init” process Channel allocations Special consideration of features of RDT

Translation: Processes (1) Could have used a single “do” loop with process state stored in a variable State would have to be a number (since there is no string type in Promela) Establishing the extent to which a process is exercised is not straightforward

Translation: Processes (2) Each RDT process is converted to a process in Promela Label in Promela for each state of the RDT process “if” statement with each label with two statements which Perform the communication Move process to the next state

Translation: Processes (3) proctype Sink(chan In, val) { initial: if :: In?Val; goto initial; fi; } proctype Source(chan Out) { initial: if :: Out?Out; goto initial; fi; }

Translation: Models (1) Performed (assembled) in the “init” process Required instances of processes are created (run) Actions enclosed in “atomic” statement (So things don’t start happening until we are ready) Connections implemented by appropriate allocation of channels as parameters to process instances

Translation: Models (2) chan ch0 = [CHLEN] of {chan}; chan nch0 = [0] of {chan}; /* Process definitions here */ init { Atomic { run Source(ch0); run Sink(ch0, nch0); } };

Translation: Models (3) Promela permits the creation of channels which carry channels Length of channels An issue – its not in the diagram Set by user at translation time Each process is given a channel as a parameter for each channel name it knows

Issues – Unconnected channels Each process has a parameter for each channel name it knows What if the name isn’t connected to anything (at start up)? Omitting parameters to processes is an error Unconnected names given a nil length channel each to avoid problems

Issues – the Create type event Permits a process to bring a new channel (value) into existence Translation scheme outlined so far requires all channels to be declared before start of execution Solution adopted is a provide processes with a collection of channels to use In current implementation, when these are exhausted, create events can no longer occur

Issues – Special case of Read if :: X?X; goto second; fi; chan tmp; … if :: atomic{X?tmp; X = tmp; } goto second; fi;

Further work I already have a tool which performs this translation automatically Solution to the Create problem…

Postscript on the Create issue A loop could execute a create event an unlimited number of times, creating a new channel each time But: There is a limit to the number of channels the processes in the model can “know” Ultimately each time a new channel is created, one is lost Hence only a finite number needed, if lost channels are re-cycled

Hierarchy Problem What we would like to draw: Abstract connection

What we usually get Boxes within Boxes With the lines brought out to the edges

What we would like to draw: What we actually do: The Usual Problem

A process for the election algorithm

Using processes to build a model And this model only has three processes

Executing the model

Building the same model with connectors

The Connector

Issues (1) Need to distinguish which end of a connector is which

Issues (2) Allowing processes to be connected at the higher, “connector” level Want to use the connectors in the model definition (before connectors and processes fully elaborated) Don’t want to add the connectors as a tidying exercise after model is complete Tool draws either view – either showing connectors (plus any individually created channels), or the all of the detail

Issues (3) What about names in the process not in the connector? What about strands in the connector not known to the process? What about strands which connect at just one end: dangling ends?

Conclusion Visual Formal Models can be useful Single level diagrams get cluttered Addressing this requires attention to channels as well as processes This is not as simple as it appears